works with leds attached

main.S

@@ -7,55 +7,35 @@
 #define SP r1
 #define SR r2
 
-;; --- register usage --------------------------------
-;; r4: synchronization between main loop and isr
-;;     bit0 signals byte done from isr
-;; r5: data byte to be handled by isr
-;; r6: bit-counter, only used within isr
-;; r7: screen data start/next pointer
-;; r8: screen data end pointer
-;; r9: next screen data byte, prepared in mainloop
-
-#define SIGNAL_INIT_VALUE 0x00
-#define SIGNAL_BYTE_DONE 0x01
-#define SIGNAL_ISR_ENABLE 0x02
-#define SIGNAL_REGISTER r4
-
-#define DATA_BYTE_REGISTER r5
-#define NEXT_DATA_BYTE_REGISTER r9
-#define DATA_NEXT_ADDRESS_REGISTER r7
-#define DATA_LAST_ADDRESS_REGISTER r8
-
-#define BIT_COUNTER_REGISTER r6
-#define BIT_COUNTER_INIT_VALUE 0x01
-;; ---------------------------------------------------
-
+#define _red 0x00
+#define _blue 0x01
+#define _green 0x02
 
   .section ".rodata","a"
 screendata:
-  .byte   0x01
-  .byte   0x03
-  .byte   0x07
-  .byte   0x0f
+  .byte   _red
+  .byte   _blue
+  .byte   _green
 screendataend:
   .byte   0xff
+
 red:
 colors1:
-  .byte   0b01001111
+  .byte   0b11111111
 colors2:
-  .byte   0b01000111
+  .byte   0b00000000
 colors3:
-  .byte   0b01000011
+  .byte   0b00000000
   .byte   0
 blue:
-  .byte   0b11001111
-  .byte   0b11000111
-  .byte   0b11000011
+  .byte   0b00000000
+  .byte   0b00000000
+  .byte   0b11111111
   .byte   0
 green:
-  .byte   0b10001111
-  .byte   0b10000111
-  .byte   0b10000011
+  .byte   0b00000000
+  .byte   0b11111111
+  .byte   0b00000000
   .byte   0
 
   ;; .text is the name of the section, it is a hint for the linker to
@@ -66,17 +46,20 @@ green:
   .section ".text","ax",@progbits
 _start:
   ;; disable watchdog
-  mov.w   #WDTPW|WDTHOLD, &WDTCTL
+  mov.w   #WDTPW|WDTHOLD,&WDTCTL
 
   ;; configure clock system to the highest frequency
-  mov.b   #DCO0|DCO1|DCO2, &DCOCTL
-  mov.b   #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3, &BCSCTL1
-  mov.b   #0, &BCSCTL2
-  mov.b   #0, &BCSCTL3
+  mov.b   #DCO0|DCO1|DCO2,&DCOCTL
+  mov.b   #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3,&BCSCTL1
+  mov.b   #0,&BCSCTL2
+  mov.b   #0,&BCSCTL3
 
   ;; initialize stack pointer with value from linker
   mov.w   #__stack, SP
 
+  mov.w   #0xaaaa, r7
+  mov.w   #0x5555, r8
+
 init:
   ;; configuration of GPIO Ports
   mov.b   #BIT0|BIT1|BIT2,&P1DIR
@@ -87,16 +70,16 @@ init:
   ;; timer configuration
   ;;  configure and stop timer
   ;;  cycle time is 56.25ns
-  mov.w   #ID_0|MC_0|TACLR|TASSEL_2, &TA1CTL
+  mov.w   #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL
   ;;  2.0us 
-  mov.w   #45, &TA1CCR0
+  mov.w   #45,&TA1CCR0
   ;;  a bit less
-  mov.w   #10, &TA1CCR1
-  mov.w   #22, &TA1CCR2
+  mov.w   #10,&TA1CCR1
+  mov.w   #22,&TA1CCR2
   ;;  configure output mode for TA0.1
-  mov.w   #CCIE, &TA1CCTL0
-  mov.w   #OUTMOD_7, &TA1CCTL1
-  mov.w   #OUTMOD_7, &TA1CCTL2
+  mov.w   #CCIE,&TA1CCTL0
+  mov.w   #OUTMOD_7,&TA1CCTL1
+  mov.w   #OUTMOD_7,&TA1CCTL2
 
   ;; initialize bit-counter for isr
   mov.b   #0x01,r6
@@ -109,11 +92,15 @@ init:
   mov.w   #screendataend, r8
 
   ;; start timer in up mode
-  bis.w   #MC0, &TA1CTL
+  bis.w   #MC0,&TA1CTL
   ;; enable interrupts
   eint
 
 
+
+
+  ;; r4: synchronization between mainloop and isr
+  ;; r5: data byte to be handled by isr
 mainloop:
   ;; prepare next byte to handle by isr
   cmp.w   r7,r8
@@ -123,19 +110,54 @@ mainloop:
   mov.b   @r7,r9
   inc.w   r7
 
-mainloop_wait_for_isr:
-  ;; check bit0 in sync register, wait for the signal from 
-  ;; the isr
-  bit     #SIGNAL_BYTE_DONE, SIGNAL_REGISTER
-  jz      mainloop_wait_for_isr
+  ;; multiple color code by four to get color data
+  rla.b   r9
+  rla.b   r9
+
+; This code already works
+;mainloop_wait_for_isr:
+;  ;; check bit0 in sync register
+;  bit     #0x01,r4
+;  jz      mainloop_wait_for_isr
+;
+;  ;; load data
+;  mov.b   r9,r5
+;  ;; clear BYTE_DONE
+;  bic     #0x01, r4
+;  ;; enable isr
+;  bis     #0x02, r4
+;
+;  ;; continue
+;  jmp     mainloop
 
-  ;; load data
-  mov.b   r9,r5
-  ;; clear BYTE_DONE
-  bic     #0x01, r4
   ;; enable isr
   bis     #0x02, r4
 
+mainloop_wait_for_isr_0:
+  ;; check bit0 in sync register
+  bit     #0x01,r4
+  jz      mainloop_wait_for_isr_0
+  ;; load data
+  mov.b   colors1(r9), r5
+  ;; clear BYTE_DONE
+  bic     #0x01, r4
+mainloop_wait_for_isr_1:
+  ;; check bit0 in sync register
+  bit     #0x01,r4
+  jz      mainloop_wait_for_isr_1
+  ;; load data
+  mov.b   colors2(r9), r5
+  ;; clear BYTE_DONE
+  bic     #0x01, r4
+mainloop_wait_for_isr_2:
+  ;; check bit0 in sync register
+  bit     #0x01,r4
+  jz      mainloop_wait_for_isr_2
+  ;; load data
+  mov.b   colors3(r9), r5
+  ;; clear BYTE_DONE
+  bic     #0x01, r4
+
   ;; continue
   jmp     mainloop
 
@@ -147,6 +169,8 @@ mainloop_data_done:
   jmp     mainloop
 
 
+
+
 ; --- timer isr ---
   ;; r6: exclusively used by isr as bit-counter
 timer1_a0_isr:
@@ -171,7 +195,7 @@ timer1_a0_isr_end:
   jnc     timer1_a0_isr_exit
 
   ;; reset bit-counter
-  mov.b   #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
+  mov.b   #0x01,r6
   ;; signal byte done
   bis     #0x01,r4
 
@@ -186,6 +210,7 @@ timer1_a0_isr_exit:
   reti
 
 
+
   .section "__interrupt_vector_14","ax",@progbits
   .word   timer1_a0_isr
 

readme.md

@@ -1,5 +1,27 @@
+## Debugging
+
+```
 mspdebug rf2500 gdb
+
 msp430-gdb -x firmware.gdb
+```
 
 Attention: the gdb in the TI toolchain package is broken, use the one from Debian
 
+
+
+## Signals Working Cycler
+
+These signals are related to code under tag `cycler_works_include_output_stage`.
+
+First octets:
+
+![](./docs/cycler_working_first_octets.png)
+
+Last octets:
+
+![](./docs/cycler_working_last_octets.png)
+
+Schematics and legend for signals:
+
+![](./docs/schematics.jpeg)