This commit is contained in:
2024-02-27 11:30:55 +01:00

102
main.S
View File

@ -33,10 +33,10 @@
.section ".rodata","a"
screendata:
.byte 0b00000001
.byte 0b00000011
.byte 0b00000111
.byte 0b00001111
.byte 0x01
.byte 0x03
.byte 0x07
.byte 0x0f
screendataend:
.byte 0xff
red:
@ -79,9 +79,10 @@ _start:
init:
;; configuration of GPIO Ports
mov.b #BIT0|BIT1|BIT2, &P1DIR
mov.b #BIT1|BIT4, &P2DIR
mov.b #BIT1|BIT4, &P2SEL
mov.b #BIT0|BIT1|BIT2,&P1DIR
mov.b #0,&P1OUT
mov.b #BIT1|BIT4,&P2DIR
mov.b #BIT1|BIT4,&P2SEL
;; timer configuration
;; configure and stop timer
@ -98,17 +99,14 @@ init:
mov.w #OUTMOD_7, &TA1CCTL2
;; initialize bit-counter for isr
mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
;; initialize isr-sync register
mov.b #SIGNAL_INIT_VALUE, SIGNAL_REGISTER
mov.b #0x01,r6
;; initialize isr-sync register, signal BYTE_DONE for the first start
mov.b #0x01,r4
;; screen data start/next into DATA_NEXT_ADDRESS_REGISTER
mov.w #screendata, DATA_NEXT_ADDRESS_REGISTER
;; screen data end into DATA_LAST_ADDRESS_REGISTER
mov.w #screendataend, DATA_LAST_ADDRESS_REGISTER
;; load first screen data value into DATA_BYTE_REGISTER
mov.b @DATA_NEXT_ADDRESS_REGISTER, DATA_BYTE_REGISTER
inc.w DATA_NEXT_ADDRESS_REGISTER
;; screen data start/next into r7
mov.w #screendata, r7
;; screen data end into r8
mov.w #screendataend, r8
;; start timer in up mode
bis.w #MC0, &TA1CTL
@ -118,16 +116,12 @@ init:
mainloop:
;; prepare next byte to handle by isr
;; first, check whether we are already at the end of screen data
cmp.w DATA_NEXT_ADDRESS_REGISTER, DATA_LAST_ADDRESS_REGISTER
jnz mainloop_prepare_next_byte
;; in that case rollover to the start again
mov.w #screendata, DATA_NEXT_ADDRESS_REGISTER
mainloop_prepare_next_byte:
;; load the byte from the screen data next pointer
mov.b @DATA_NEXT_ADDRESS_REGISTER, NEXT_DATA_BYTE_REGISTER
;; and increase the pointer
inc.w DATA_NEXT_ADDRESS_REGISTER
cmp.w r7,r8
jz mainloop_data_done
;; load next data byte
mov.b @r7,r9
inc.w r7
mainloop_wait_for_isr:
;; check bit0 in sync register, wait for the signal from
@ -136,50 +130,64 @@ mainloop_wait_for_isr:
jz mainloop_wait_for_isr
;; load data
mov.b NEXT_DATA_BYTE_REGISTER, DATA_BYTE_REGISTER
;; clear the signal
bic #SIGNAL_BYTE_DONE, SIGNAL_REGISTER
;; mark the cycle
bis #BIT2, &P1OUT
bic #BIT2, &P1OUT
mov.b r9,r5
;; clear BYTE_DONE
bic #0x01, r4
;; enable isr
bis #0x02, r4
;; continue
jmp mainloop
mainloop_data_done:
;; signal all data processed, isr finish
bis #0x04, r4
bis #BIT2, &P1OUT
;; continue
jmp mainloop
; --- timer isr ---
;; r6: exclusively used by isr as bit-counter
timer1_a0_isr:
;; func begin marker
bis #BIT0, &P1OUT
;; check isr idle bit
bit #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
jnz timer1_a0_isr_exit
;; check isr enable bit
bit #0x02,r4
jz timer1_a0_isr_exit
;; shift msb of data register r5 into carry flag and set or reset P1.1 accordingly
rla.b DATA_BYTE_REGISTER
;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
rla.b r5
jnc timer1_a0_isr_false_bit
bis #BIT1, &P1OUT
bis #BIT0,&P1OUT
jmp timer1_a0_isr_end
timer1_a0_isr_false_bit:
bic #BIT1, &P1OUT
bic #BIT0,&P1OUT
;; shift bit-counter, after eight shifts signal byte done and reset bit-counter
timer1_a0_isr_end:
rla.b BIT_COUNTER_REGISTER
;; enable output
bis #BIT1, &P1OUT
;; roll bit-counter
rla.b r6
jnc timer1_a0_isr_exit
;; reset bit-counter
mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
;; signal byte done
bis #SIGNAL_BYTE_DONE, SIGNAL_REGISTER
bis #0x01,r4
bit #0x04, r4
jz timer1_a0_isr_exit
;; disable isr
bic #0x02, r4
;; disable output
bic #BIT1, &P1OUT
timer1_a0_isr_exit:
;; func end marker
bic #BIT0, &P1OUT
reti
.section "__interrupt_vector_14","ax",@progbits
.word timer1_a0_isr
;; .resetvec comes from linker
.section ".resetvec","ax",@progbits