add oled pins and SPI in Cube
This commit is contained in:
@ -19,6 +19,7 @@ my_src/led.o: ../my_src/led.c ../system/include/stm32f1xx/stm32f1xx_hal.h \
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../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
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../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
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../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
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../system/include/stm32f1xx/stm32f1xx_hal_spi.h \
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/home/wn/workspace-stm32/newcar/hottislib/PontCoopScheduler.h
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../system/include/stm32f1xx/stm32f1xx_hal.h:
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@ -65,4 +66,6 @@ my_src/led.o: ../my_src/led.c ../system/include/stm32f1xx/stm32f1xx_hal.h \
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../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
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../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
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/home/wn/workspace-stm32/newcar/hottislib/PontCoopScheduler.h:
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@ -20,7 +20,8 @@ my_src/main2.o: ../my_src/main2.c \
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../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
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../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
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../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
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../system/include/stm32f1xx/stm32f1xx_hal_pwr.h ../my_src/led.h
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../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
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../system/include/stm32f1xx/stm32f1xx_hal_spi.h ../my_src/led.h
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/home/wn/workspace-stm32/newcar/hottislib/PontCoopScheduler.h:
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@ -68,4 +69,6 @@ my_src/main2.o: ../my_src/main2.c \
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../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
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../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
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../my_src/led.h:
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Debug/newcar.elf
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Debug/newcar.elf
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Debug/newcar.hex
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|
||||
:101A5400632E63002E2E2F73797374656D2F73724A
|
||||
:101A6400632F73746D3332663178782F73746D33EA
|
||||
:101A740032663178785F68616C5F7370695F65782E
|
||||
:101A84002E630000000000000000000001020304B7
|
||||
:041A94000607080930
|
||||
:101A980078563412200000200000000000A24A04FA
|
||||
:041AA80032547698A6
|
||||
:04000005080001E509
|
||||
:00000001FF
|
||||
|
1288
Debug/newcar.map
1288
Debug/newcar.map
File diff suppressed because it is too large
Load Diff
@ -19,6 +19,7 @@ src/main.o: ../src/main.c ../system/include/stm32f1xx/stm32f1xx_hal.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h \
|
||||
/home/wn/workspace-stm32/newcar/my_src/main2.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
@ -65,4 +66,6 @@ src/main.o: ../src/main.c ../system/include/stm32f1xx/stm32f1xx_hal.h \
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
||||
/home/wn/workspace-stm32/newcar/my_src/main2.h:
|
||||
|
BIN
Debug/src/main.o
BIN
Debug/src/main.o
Binary file not shown.
@ -19,7 +19,8 @@ src/stm32f1xx_hal_msp.o: ../src/stm32f1xx_hal_msp.c \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -64,3 +65,5 @@ src/stm32f1xx_hal_msp.o: ../src/stm32f1xx_hal_msp.c \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,6 +20,7 @@ src/stm32f1xx_it.o: ../src/stm32f1xx_it.c \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h \
|
||||
../include/stm32f1xx_it.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
@ -66,4 +67,6 @@ src/stm32f1xx_it.o: ../src/stm32f1xx_it.c \
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
||||
../include/stm32f1xx_it.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_cortex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_cortex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_dma.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_dma.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_flash.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_flash.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_flash_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_flash_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_gpio.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_gpio.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_gpio_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_gpio_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_pwr.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_pwr.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_rcc.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_rcc.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_rcc_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_rcc_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
70
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi.d
Normal file
70
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi.d
Normal file
@ -0,0 +1,70 @@
|
||||
system/src/stm32f1xx/stm32f1xx_hal_spi.o: \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_spi.c \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h \
|
||||
../include/stm32f1xx_hal_conf.h ../include/mxconstants.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_def.h \
|
||||
../system/include/cmsis/device/stm32f1xx.h \
|
||||
../system/include/cmsis/device/stm32f103xe.h \
|
||||
../system/include/cmsis/core_cm3.h \
|
||||
../system/include/cmsis/core_cmInstr.h \
|
||||
../system/include/cmsis/cmsis_gcc.h \
|
||||
../system/include/cmsis/core_cmFunc.h \
|
||||
../system/include/cmsis/device/system_stm32f1xx.h \
|
||||
../system/include/stm32f1xx/Legacy/stm32_hal_legacy.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
../include/stm32f1xx_hal_conf.h:
|
||||
|
||||
../include/mxconstants.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_def.h:
|
||||
|
||||
../system/include/cmsis/device/stm32f1xx.h:
|
||||
|
||||
../system/include/cmsis/device/stm32f103xe.h:
|
||||
|
||||
../system/include/cmsis/core_cm3.h:
|
||||
|
||||
../system/include/cmsis/core_cmInstr.h:
|
||||
|
||||
../system/include/cmsis/cmsis_gcc.h:
|
||||
|
||||
../system/include/cmsis/core_cmFunc.h:
|
||||
|
||||
../system/include/cmsis/device/system_stm32f1xx.h:
|
||||
|
||||
../system/include/stm32f1xx/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
BIN
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi.o
Normal file
BIN
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi.o
Normal file
Binary file not shown.
70
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi_ex.d
Normal file
70
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi_ex.d
Normal file
@ -0,0 +1,70 @@
|
||||
system/src/stm32f1xx/stm32f1xx_hal_spi_ex.o: \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_spi_ex.c \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h \
|
||||
../include/stm32f1xx_hal_conf.h ../include/mxconstants.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_def.h \
|
||||
../system/include/cmsis/device/stm32f1xx.h \
|
||||
../system/include/cmsis/device/stm32f103xe.h \
|
||||
../system/include/cmsis/core_cm3.h \
|
||||
../system/include/cmsis/core_cmInstr.h \
|
||||
../system/include/cmsis/cmsis_gcc.h \
|
||||
../system/include/cmsis/core_cmFunc.h \
|
||||
../system/include/cmsis/device/system_stm32f1xx.h \
|
||||
../system/include/stm32f1xx/Legacy/stm32_hal_legacy.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
../include/stm32f1xx_hal_conf.h:
|
||||
|
||||
../include/mxconstants.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_def.h:
|
||||
|
||||
../system/include/cmsis/device/stm32f1xx.h:
|
||||
|
||||
../system/include/cmsis/device/stm32f103xe.h:
|
||||
|
||||
../system/include/cmsis/core_cm3.h:
|
||||
|
||||
../system/include/cmsis/core_cmInstr.h:
|
||||
|
||||
../system/include/cmsis/cmsis_gcc.h:
|
||||
|
||||
../system/include/cmsis/core_cmFunc.h:
|
||||
|
||||
../system/include/cmsis/device/system_stm32f1xx.h:
|
||||
|
||||
../system/include/stm32f1xx/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_rcc_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_gpio_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_dma_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
BIN
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi_ex.o
Normal file
BIN
Debug/system/src/stm32f1xx/stm32f1xx_hal_spi_ex.o
Normal file
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_tim.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_tim.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -20,7 +20,8 @@ system/src/stm32f1xx/stm32f1xx_hal_tim_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_cortex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal.h:
|
||||
|
||||
@ -65,3 +66,5 @@ system/src/stm32f1xx/stm32f1xx_hal_tim_ex.o: \
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_flash_ex.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_pwr.h:
|
||||
|
||||
../system/include/stm32f1xx/stm32f1xx_hal_spi.h:
|
||||
|
Binary file not shown.
@ -14,6 +14,8 @@ C_SRCS += \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_pwr.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_rcc.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_rcc_ex.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_spi.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_spi_ex.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_tim.c \
|
||||
../system/src/stm32f1xx/stm32f1xx_hal_tim_ex.c
|
||||
|
||||
@ -28,6 +30,8 @@ OBJS += \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_pwr.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_rcc.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_rcc_ex.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_spi.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_spi_ex.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_tim.o \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_tim_ex.o
|
||||
|
||||
@ -42,6 +46,8 @@ C_DEPS += \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_pwr.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_rcc.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_rcc_ex.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_spi.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_spi_ex.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_tim.d \
|
||||
./system/src/stm32f1xx/stm32f1xx_hal_tim_ex.d
|
||||
|
||||
|
@ -5,9 +5,9 @@ SourcePath=/home/wn/workspace-stm32/newcar/cube/newcar/Src
|
||||
SourceFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;mxconstants.h;stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c;
|
||||
|
||||
[PreviousLibFiles]
|
||||
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h;
|
||||
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h;
|
||||
|
||||
[PreviousUsedRideFiles]
|
||||
SourceFiles=../Src/main.c;../Src/stm32f1xx_it.c;../Src/stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s;
|
||||
SourceFiles=../Src/main.c;../Src/stm32f1xx_it.c;../Src/stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s;
|
||||
HeaderPath=../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Include;../Drivers/CMSIS/Device/ST/STM32F1xx/Include;
|
||||
|
||||
|
674
cube/newcar/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h
Normal file
674
cube/newcar/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h
Normal file
@ -0,0 +1,674 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.4
|
||||
* @date 29-April-2016
|
||||
* @brief Header file of SPI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_HAL_SPI_H
|
||||
#define __STM32F1xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Types SPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
|
||||
uint32_t Direction; /*!< Specifies the SPI Directional mode state.
|
||||
This parameter can be a value of @ref SPI_Direction_mode */
|
||||
|
||||
uint32_t DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set */
|
||||
|
||||
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
|
||||
This parameter can be a value of @ref SPI_TI_mode */
|
||||
|
||||
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
|
||||
This parameter can be a value of @ref SPI_CRC_Calculation */
|
||||
|
||||
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
|
||||
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI State structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
|
||||
HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
|
||||
HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
|
||||
|
||||
}HAL_SPI_StateTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SPI handle Structure definition
|
||||
*/
|
||||
typedef struct __SPI_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< SPI registers base address */
|
||||
|
||||
SPI_InitTypeDef Init; /*!< SPI communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< SPI Tx transfer size */
|
||||
|
||||
uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< SPI Rx transfer size */
|
||||
|
||||
uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle parameters */
|
||||
|
||||
void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
|
||||
|
||||
void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< SPI locking object */
|
||||
|
||||
__IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
}SPI_HandleTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants SPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Error_Codes SPI Error Codes
|
||||
* @{
|
||||
*/
|
||||
#define HAL_SPI_ERROR_NONE ((uint32_t)0x00) /*!< No error */
|
||||
#define HAL_SPI_ERROR_MODF ((uint32_t)0x01) /*!< MODF error */
|
||||
#define HAL_SPI_ERROR_CRC ((uint32_t)0x02) /*!< CRC error */
|
||||
#define HAL_SPI_ERROR_OVR ((uint32_t)0x04) /*!< OVR error */
|
||||
#define HAL_SPI_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG ((uint32_t)0x10) /*!< Flag: RXNE,TXE, BSY */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/** @defgroup SPI_mode SPI mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_MODE_SLAVE ((uint32_t)0x00000000)
|
||||
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Direction_mode SPI Direction mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
|
||||
#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
||||
#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size SPI data size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
|
||||
#define SPI_DATASIZE_16BIT SPI_CR1_DFF
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define SPI_POLARITY_LOW ((uint32_t)0x00000000)
|
||||
#define SPI_POLARITY_HIGH SPI_CR1_CPOL
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase SPI Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
|
||||
#define SPI_PHASE_2EDGE SPI_CR1_CPHA
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management SPI Slave Select management
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_SOFT SPI_CR1_SSM
|
||||
#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
|
||||
#define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
|
||||
#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2)
|
||||
#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
|
||||
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TI_mode SPI TI mode disable
|
||||
* @brief SPI TI Mode not supported for STM32F1xx family
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
|
||||
#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE SPI_CR2_TXEIE
|
||||
#define SPI_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define SPI_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Flag_definition SPI Flag definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FLAG_RXNE SPI_SR_RXNE
|
||||
#define SPI_FLAG_TXE SPI_SR_TXE
|
||||
#define SPI_FLAG_CRCERR SPI_SR_CRCERR
|
||||
#define SPI_FLAG_MODF SPI_SR_MODF
|
||||
#define SPI_FLAG_OVR SPI_SR_OVR
|
||||
#define SPI_FLAG_BSY SPI_SR_BSY
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Constants SPI Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define SPI_INVALID_CRC_ERROR 0 /* CRC error wrongly detected */
|
||||
#define SPI_VALID_CRC_ERROR 1 /* CRC error is true */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Macros SPI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset SPI handle state
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the specified SPI interrupts.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check if the specified SPI interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the SPI CRCERR pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
|
||||
|
||||
/** @brief Clear the SPI MODF pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
tmpreg = CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
|
||||
UNUSED(tmpreg); \
|
||||
}while(0)
|
||||
|
||||
/** @brief Clear the SPI OVR pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg); \
|
||||
}while(0)
|
||||
|
||||
|
||||
/** @brief Enables the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/** @brief Disables the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private macros -----------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Macros SPI Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__: specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_data_size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT))
|
||||
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__: specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__: specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
/** @brief Checks if SPI Slave select parameter is in allowed range.
|
||||
* @param __NSS__: specifies the SPI Slave Slelect management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__: specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
|
||||
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__: specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1) && ((__POLYNOMIAL__) <= 0xFFFF))
|
||||
|
||||
/** @brief Sets the SPI transmit-only mode.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Sets the SPI receive-only mode.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Resets the CRC calculation of the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* I/O operation functions *****************************************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
|
||||
|
||||
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Peripheral State and Control functions **************************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
|
||||
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_HAL_SPI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
2410
cube/newcar/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
Normal file
2410
cube/newcar/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,217 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_spi_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.4
|
||||
* @date 29-April-2016
|
||||
* @brief Extended SPI HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities SPI extension peripheral:
|
||||
* + Extended Peripheral Control functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
|
||||
/** @defgroup SPI_Private_Variables SPI Private Variables
|
||||
* @{
|
||||
*/
|
||||
/* Variable used to determine if device is impacted by implementation of workaround
|
||||
related to wrong CRC errors detection on SPI2. Conditions in which this workaround has to be applied, are:
|
||||
- STM32F101CDE/STM32F103CDE
|
||||
- Revision ID : Z
|
||||
- SPI2
|
||||
- In receive only mode, with CRC calculation enabled, at the end of the CRC reception,
|
||||
the software needs to check the CRCERR flag. If it is found set, read back the SPI_RXCRC:
|
||||
+ If the value is 0, the complete data transfer is successful.
|
||||
+ Otherwise, one or more errors have been detected during the data transfer by CPU or DMA.
|
||||
If CRCERR is found reset, the complete data transfer is considered successful.
|
||||
*/
|
||||
uint8_t uCRCErrorWorkaroundCheck = 0;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPI according to the specified parameters
|
||||
* in the SPI_InitTypeDef and create the associated handle.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
/* Check the SPI handle allocation */
|
||||
if(hspi == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
|
||||
assert_param(IS_SPI_MODE(hspi->Init.Mode));
|
||||
assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
|
||||
assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
|
||||
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
|
||||
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
|
||||
assert_param(IS_SPI_NSS(hspi->Init.NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
|
||||
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
|
||||
assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
||||
|
||||
if(hspi->State == HAL_SPI_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||||
HAL_SPI_MspInit(hspi);
|
||||
}
|
||||
|
||||
hspi->State = HAL_SPI_STATE_BUSY;
|
||||
|
||||
/* Disble the selected SPI peripheral */
|
||||
__HAL_SPI_DISABLE(hspi);
|
||||
|
||||
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
||||
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
||||
Communication speed, First bit and CRC calculation state */
|
||||
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
|
||||
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
|
||||
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
|
||||
|
||||
/* Configure : NSS management */
|
||||
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration ------------------*/
|
||||
/* Configure : CRC Polynomial */
|
||||
WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
|
||||
|
||||
#if defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
|
||||
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
||||
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
||||
#endif
|
||||
|
||||
#if defined (STM32F101xE) || defined (STM32F103xE)
|
||||
/* Check RevisionID value for identifying if Device is Rev Z (0x0001) in order to enable workaround for
|
||||
CRC errors wrongly detected */
|
||||
/* Pb is that ES_STM32F10xxCDE also identify an issue in Debug registers access while not in Debug mode.
|
||||
Revision ID information is only available in Debug mode, so Workaround could not be implemented
|
||||
to distinguish Rev Z devices (issue present) from more recent version (issue fixed).
|
||||
So, in case of Revison Z F101 or F103 devices, below variable should be assigned to 1 */
|
||||
uCRCErrorWorkaroundCheck = 0;
|
||||
#else
|
||||
uCRCErrorWorkaroundCheck = 0;
|
||||
#endif
|
||||
|
||||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Checks if encountered CRC error could be corresponding to wrongly detected errors
|
||||
* according to SPI instance, Device type, and revision ID.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval CRC error validity (SPI_INVALID_CRC_ERROR or SPI_VALID_CRC_ERROR).
|
||||
*/
|
||||
uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
#if defined (STM32F101xE) || defined (STM32F103xE)
|
||||
/* Check how to handle this CRC error (workaround to be applied or not) */
|
||||
/* If CRC errors could be wrongly detected (issue 2.15.2 in STM32F10xxC/D/E silicon limitations ES (DocID14732 Rev 13) */
|
||||
if ( (uCRCErrorWorkaroundCheck != 0) && (hspi->Instance == SPI2) )
|
||||
{
|
||||
if (hspi->Instance->RXCRCR == 0)
|
||||
{
|
||||
return (SPI_INVALID_CRC_ERROR);
|
||||
}
|
||||
}
|
||||
return (SPI_VALID_CRC_ERROR);
|
||||
#else
|
||||
return (SPI_VALID_CRC_ERROR);
|
||||
#endif
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
@ -43,6 +43,12 @@
|
||||
|
||||
#define LED_Pin GPIO_PIN_13
|
||||
#define LED_GPIO_Port GPIOC
|
||||
#define OLED_DC_Pin GPIO_PIN_1
|
||||
#define OLED_DC_GPIO_Port GPIOA
|
||||
#define OLED_RST_Pin GPIO_PIN_2
|
||||
#define OLED_RST_GPIO_Port GPIOA
|
||||
#define OLED_CS_Pin GPIO_PIN_3
|
||||
#define OLED_CS_GPIO_Port GPIOA
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
@ -75,7 +75,7 @@
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_SDRAM_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
/*#define HAL_UART_MODULE_ENABLED */
|
||||
|
@ -38,6 +38,7 @@
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
SPI_HandleTypeDef hspi1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
@ -48,6 +49,7 @@
|
||||
void SystemClock_Config(void);
|
||||
void Error_Handler(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_SPI1_Init(void);
|
||||
|
||||
/* USER CODE BEGIN PFP */
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
@ -75,6 +77,7 @@ int main(void)
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_SPI1_Init();
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
@ -131,6 +134,29 @@ void SystemClock_Config(void)
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
/* SPI1 init function */
|
||||
static void MX_SPI1_Init(void)
|
||||
{
|
||||
|
||||
hspi1.Instance = SPI1;
|
||||
hspi1.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
|
||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi1.Init.CRCPolynomial = 10;
|
||||
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** Configure pins as
|
||||
* Analog
|
||||
* Input
|
||||
@ -150,12 +176,21 @@ static void MX_GPIO_Init(void)
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin : LED_Pin */
|
||||
GPIO_InitStruct.Pin = LED_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : OLED_DC_Pin OLED_RST_Pin OLED_CS_Pin */
|
||||
GPIO_InitStruct.Pin = OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
@ -77,6 +77,65 @@ void HAL_MspInit(void)
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
}
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
@ -4,17 +4,24 @@ KeepUserPlacement=false
|
||||
Mcu.Family=STM32F1
|
||||
Mcu.IP0=NVIC
|
||||
Mcu.IP1=RCC
|
||||
Mcu.IP2=SYS
|
||||
Mcu.IPNb=3
|
||||
Mcu.IP2=SPI1
|
||||
Mcu.IP3=SYS
|
||||
Mcu.IPNb=4
|
||||
Mcu.Name=STM32F103V(C-D-E)Tx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PC13-TAMPER-RTC
|
||||
Mcu.Pin1=OSC_IN
|
||||
Mcu.Pin10=PA14
|
||||
Mcu.Pin11=VP_SYS_VS_Systick
|
||||
Mcu.Pin2=OSC_OUT
|
||||
Mcu.Pin3=PA13
|
||||
Mcu.Pin4=PA14
|
||||
Mcu.Pin5=VP_SYS_VS_Systick
|
||||
Mcu.PinsNb=6
|
||||
Mcu.Pin3=PA1
|
||||
Mcu.Pin4=PA2
|
||||
Mcu.Pin5=PA3
|
||||
Mcu.Pin6=PA5
|
||||
Mcu.Pin7=PA6
|
||||
Mcu.Pin8=PA7
|
||||
Mcu.Pin9=PA13
|
||||
Mcu.PinsNb=12
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F103VCTx
|
||||
MxCube.Version=4.16.1
|
||||
@ -33,10 +40,28 @@ OSC_IN.Mode=HSE-External-Oscillator
|
||||
OSC_IN.Signal=RCC_OSC_IN
|
||||
OSC_OUT.Mode=HSE-External-Oscillator
|
||||
OSC_OUT.Signal=RCC_OSC_OUT
|
||||
PA1.GPIOParameters=GPIO_Label
|
||||
PA1.GPIO_Label=OLED_DC
|
||||
PA1.Locked=true
|
||||
PA1.Signal=GPIO_Output
|
||||
PA13.Mode=Serial_Wire
|
||||
PA13.Signal=SYS_JTMS-SWDIO
|
||||
PA14.Mode=Serial_Wire
|
||||
PA14.Signal=SYS_JTCK-SWCLK
|
||||
PA2.GPIOParameters=GPIO_Label
|
||||
PA2.GPIO_Label=OLED_RST
|
||||
PA2.Locked=true
|
||||
PA2.Signal=GPIO_Output
|
||||
PA3.GPIOParameters=GPIO_Label
|
||||
PA3.GPIO_Label=OLED_CS
|
||||
PA3.Locked=true
|
||||
PA3.Signal=GPIO_Output
|
||||
PA5.Mode=Full_Duplex_Master
|
||||
PA5.Signal=SPI1_SCK
|
||||
PA6.Mode=Full_Duplex_Master
|
||||
PA6.Signal=SPI1_MISO
|
||||
PA7.Mode=Full_Duplex_Master
|
||||
PA7.Signal=SPI1_MOSI
|
||||
PC13-TAMPER-RTC.GPIOParameters=GPIO_Label
|
||||
PC13-TAMPER-RTC.GPIO_Label=LED
|
||||
PC13-TAMPER-RTC.Locked=true
|
||||
@ -72,7 +97,7 @@ ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=SW4STM32
|
||||
ProjectManager.ToolChainLocation=/home/wn/workspace-stm32/newcar/cube/newcar
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false,2-MX_SPI1_Init-SPI1-false
|
||||
RCC.ADCFreqValue=36000000
|
||||
RCC.AHBFreq_Value=72000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV2
|
||||
@ -100,6 +125,10 @@ RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
RCC.TimSysFreq_Value=72000000
|
||||
RCC.USBFreq_Value=72000000
|
||||
RCC.VCOOutput2Freq_Value=8000000
|
||||
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_16
|
||||
SPI1.CalculateBaudRate=4.5 MBits/s
|
||||
SPI1.IPParameters=Mode,BaudRatePrescaler,CalculateBaudRate
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=newcar
|
||||
|
@ -43,6 +43,12 @@
|
||||
|
||||
#define LED_Pin GPIO_PIN_13
|
||||
#define LED_GPIO_Port GPIOC
|
||||
#define OLED_DC_Pin GPIO_PIN_1
|
||||
#define OLED_DC_GPIO_Port GPIOA
|
||||
#define OLED_RST_Pin GPIO_PIN_2
|
||||
#define OLED_RST_GPIO_Port GPIOA
|
||||
#define OLED_CS_Pin GPIO_PIN_3
|
||||
#define OLED_CS_GPIO_Port GPIOA
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
@ -75,7 +75,7 @@
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_SDRAM_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
/*#define HAL_UART_MODULE_ENABLED */
|
||||
|
35
src/main.c
35
src/main.c
@ -39,6 +39,7 @@
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
SPI_HandleTypeDef hspi1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
@ -49,6 +50,7 @@
|
||||
void SystemClock_Config(void);
|
||||
void Error_Handler(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_SPI1_Init(void);
|
||||
|
||||
/* USER CODE BEGIN PFP */
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
@ -77,6 +79,7 @@ int main(void)
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_SPI1_Init();
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
my_setup_2();
|
||||
@ -135,6 +138,29 @@ void SystemClock_Config(void)
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
/* SPI1 init function */
|
||||
static void MX_SPI1_Init(void)
|
||||
{
|
||||
|
||||
hspi1.Instance = SPI1;
|
||||
hspi1.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
|
||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi1.Init.CRCPolynomial = 10;
|
||||
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** Configure pins as
|
||||
* Analog
|
||||
* Input
|
||||
@ -154,12 +180,21 @@ static void MX_GPIO_Init(void)
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin : LED_Pin */
|
||||
GPIO_InitStruct.Pin = LED_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : OLED_DC_Pin OLED_RST_Pin OLED_CS_Pin */
|
||||
GPIO_InitStruct.Pin = OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
@ -38,6 +38,7 @@
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
SPI_HandleTypeDef hspi1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
@ -48,6 +49,7 @@
|
||||
void SystemClock_Config(void);
|
||||
void Error_Handler(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_SPI1_Init(void);
|
||||
|
||||
/* USER CODE BEGIN PFP */
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
@ -75,6 +77,7 @@ int main(void)
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_SPI1_Init();
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
@ -131,6 +134,29 @@ void SystemClock_Config(void)
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
/* SPI1 init function */
|
||||
static void MX_SPI1_Init(void)
|
||||
{
|
||||
|
||||
hspi1.Instance = SPI1;
|
||||
hspi1.Init.Mode = SPI_MODE_MASTER;
|
||||
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi1.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
|
||||
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi1.Init.CRCPolynomial = 10;
|
||||
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** Configure pins as
|
||||
* Analog
|
||||
* Input
|
||||
@ -150,12 +176,21 @@ static void MX_GPIO_Init(void)
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOA, OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/*Configure GPIO pin : LED_Pin */
|
||||
GPIO_InitStruct.Pin = LED_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pins : OLED_DC_Pin OLED_RST_Pin OLED_CS_Pin */
|
||||
GPIO_InitStruct.Pin = OLED_DC_Pin|OLED_RST_Pin|OLED_CS_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
@ -77,6 +77,65 @@ void HAL_MspInit(void)
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
}
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
674
system/include/stm32f1xx/stm32f1xx_hal_spi.h
Normal file
674
system/include/stm32f1xx/stm32f1xx_hal_spi.h
Normal file
@ -0,0 +1,674 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.4
|
||||
* @date 29-April-2016
|
||||
* @brief Header file of SPI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_HAL_SPI_H
|
||||
#define __STM32F1xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Types SPI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief SPI Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Mode; /*!< Specifies the SPI operating mode.
|
||||
This parameter can be a value of @ref SPI_mode */
|
||||
|
||||
uint32_t Direction; /*!< Specifies the SPI Directional mode state.
|
||||
This parameter can be a value of @ref SPI_Direction_mode */
|
||||
|
||||
uint32_t DataSize; /*!< Specifies the SPI data size.
|
||||
This parameter can be a value of @ref SPI_data_size */
|
||||
|
||||
uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
|
||||
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||
|
||||
uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
|
||||
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||
|
||||
uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
|
||||
hardware (NSS pin) or by software using the SSI bit.
|
||||
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||
|
||||
uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||
used to configure the transmit and receive SCK clock.
|
||||
This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
@note The communication clock is derived from the master
|
||||
clock. The slave clock does not need to be set */
|
||||
|
||||
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||
|
||||
uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
|
||||
This parameter can be a value of @ref SPI_TI_mode */
|
||||
|
||||
uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
|
||||
This parameter can be a value of @ref SPI_CRC_Calculation */
|
||||
|
||||
uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
|
||||
|
||||
}SPI_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI State structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
|
||||
HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
|
||||
HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
|
||||
HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
|
||||
|
||||
}HAL_SPI_StateTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SPI handle Structure definition
|
||||
*/
|
||||
typedef struct __SPI_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< SPI registers base address */
|
||||
|
||||
SPI_InitTypeDef Init; /*!< SPI communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< SPI Tx transfer size */
|
||||
|
||||
uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< SPI Rx transfer size */
|
||||
|
||||
uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle parameters */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle parameters */
|
||||
|
||||
void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
|
||||
|
||||
void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< SPI locking object */
|
||||
|
||||
__IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
}SPI_HandleTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup SPI_Exported_Constants SPI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Error_Codes SPI Error Codes
|
||||
* @{
|
||||
*/
|
||||
#define HAL_SPI_ERROR_NONE ((uint32_t)0x00) /*!< No error */
|
||||
#define HAL_SPI_ERROR_MODF ((uint32_t)0x01) /*!< MODF error */
|
||||
#define HAL_SPI_ERROR_CRC ((uint32_t)0x02) /*!< CRC error */
|
||||
#define HAL_SPI_ERROR_OVR ((uint32_t)0x04) /*!< OVR error */
|
||||
#define HAL_SPI_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG ((uint32_t)0x10) /*!< Flag: RXNE,TXE, BSY */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/** @defgroup SPI_mode SPI mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_MODE_SLAVE ((uint32_t)0x00000000)
|
||||
#define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Direction_mode SPI Direction mode
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
|
||||
#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
|
||||
#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_data_size SPI data size
|
||||
* @{
|
||||
*/
|
||||
#define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
|
||||
#define SPI_DATASIZE_16BIT SPI_CR1_DFF
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define SPI_POLARITY_LOW ((uint32_t)0x00000000)
|
||||
#define SPI_POLARITY_HIGH SPI_CR1_CPOL
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Clock_Phase SPI Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
|
||||
#define SPI_PHASE_2EDGE SPI_CR1_CPHA
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Slave_Select_management SPI Slave Select management
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NSS_SOFT SPI_CR1_SSM
|
||||
#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
|
||||
#define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
|
||||
#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2)
|
||||
#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0)
|
||||
#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1)
|
||||
#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
|
||||
#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_TI_mode SPI TI mode disable
|
||||
* @brief SPI TI Mode not supported for STM32F1xx family
|
||||
* @{
|
||||
*/
|
||||
#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
|
||||
* @{
|
||||
*/
|
||||
#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
|
||||
#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_IT_TXE SPI_CR2_TXEIE
|
||||
#define SPI_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define SPI_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SPI_Flag_definition SPI Flag definition
|
||||
* @{
|
||||
*/
|
||||
#define SPI_FLAG_RXNE SPI_SR_RXNE
|
||||
#define SPI_FLAG_TXE SPI_SR_TXE
|
||||
#define SPI_FLAG_CRCERR SPI_SR_CRCERR
|
||||
#define SPI_FLAG_MODF SPI_SR_MODF
|
||||
#define SPI_FLAG_OVR SPI_SR_OVR
|
||||
#define SPI_FLAG_BSY SPI_SR_BSY
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Constants SPI Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define SPI_INVALID_CRC_ERROR 0 /* CRC error wrongly detected */
|
||||
#define SPI_VALID_CRC_ERROR 1 /* CRC error is true */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup SPI_Exported_Macros SPI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset SPI handle state
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable the specified SPI interrupts.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check if the specified SPI interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __INTERRUPT__: specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the SPI CRCERR pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
|
||||
|
||||
/** @brief Clear the SPI MODF pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
tmpreg = CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
|
||||
UNUSED(tmpreg); \
|
||||
}while(0)
|
||||
|
||||
/** @brief Clear the SPI OVR pending flag.
|
||||
* @param __HANDLE__: specifies the SPI handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg); \
|
||||
}while(0)
|
||||
|
||||
|
||||
/** @brief Enables the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/** @brief Disables the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private macros -----------------------------------------------------------*/
|
||||
/** @defgroup SPI_Private_Macros SPI Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__: specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__: specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_data_size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT))
|
||||
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__: specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__: specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
/** @brief Checks if SPI Slave select parameter is in allowed range.
|
||||
* @param __NSS__: specifies the SPI Slave Slelect management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__: specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__: specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
|
||||
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__: specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1) && ((__POLYNOMIAL__) <= 0xFFFF))
|
||||
|
||||
/** @brief Sets the SPI transmit-only mode.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Sets the SPI receive-only mode.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
|
||||
|
||||
/** @brief Resets the CRC calculation of the SPI.
|
||||
* @param __HANDLE__: specifies the SPI Handle.
|
||||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* I/O operation functions *****************************************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
|
||||
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
|
||||
|
||||
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Peripheral State and Control functions **************************************/
|
||||
/** @addtogroup SPI_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
|
||||
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private functions --------------------------------------------------------*/
|
||||
/** @addtogroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_HAL_SPI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
2410
system/src/stm32f1xx/stm32f1xx_hal_spi.c
Normal file
2410
system/src/stm32f1xx/stm32f1xx_hal_spi.c
Normal file
File diff suppressed because it is too large
Load Diff
217
system/src/stm32f1xx/stm32f1xx_hal_spi_ex.c
Normal file
217
system/src/stm32f1xx/stm32f1xx_hal_spi_ex.c
Normal file
@ -0,0 +1,217 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_spi_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.4
|
||||
* @date 29-April-2016
|
||||
* @brief Extended SPI HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities SPI extension peripheral:
|
||||
* + Extended Peripheral Control functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
|
||||
/** @defgroup SPI_Private_Variables SPI Private Variables
|
||||
* @{
|
||||
*/
|
||||
/* Variable used to determine if device is impacted by implementation of workaround
|
||||
related to wrong CRC errors detection on SPI2. Conditions in which this workaround has to be applied, are:
|
||||
- STM32F101CDE/STM32F103CDE
|
||||
- Revision ID : Z
|
||||
- SPI2
|
||||
- In receive only mode, with CRC calculation enabled, at the end of the CRC reception,
|
||||
the software needs to check the CRCERR flag. If it is found set, read back the SPI_RXCRC:
|
||||
+ If the value is 0, the complete data transfer is successful.
|
||||
+ Otherwise, one or more errors have been detected during the data transfer by CPU or DMA.
|
||||
If CRCERR is found reset, the complete data transfer is considered successful.
|
||||
*/
|
||||
uint8_t uCRCErrorWorkaroundCheck = 0;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Exported_Functions_Group1
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Initializes the SPI according to the specified parameters
|
||||
* in the SPI_InitTypeDef and create the associated handle.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
/* Check the SPI handle allocation */
|
||||
if(hspi == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
|
||||
assert_param(IS_SPI_MODE(hspi->Init.Mode));
|
||||
assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
|
||||
assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
|
||||
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
|
||||
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
|
||||
assert_param(IS_SPI_NSS(hspi->Init.NSS));
|
||||
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
|
||||
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
|
||||
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
|
||||
assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
|
||||
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
||||
|
||||
if(hspi->State == HAL_SPI_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
||||
HAL_SPI_MspInit(hspi);
|
||||
}
|
||||
|
||||
hspi->State = HAL_SPI_STATE_BUSY;
|
||||
|
||||
/* Disble the selected SPI peripheral */
|
||||
__HAL_SPI_DISABLE(hspi);
|
||||
|
||||
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
||||
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
||||
Communication speed, First bit and CRC calculation state */
|
||||
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
|
||||
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
|
||||
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
|
||||
|
||||
/* Configure : NSS management */
|
||||
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
|
||||
|
||||
/*---------------------------- SPIx CRCPOLY Configuration ------------------*/
|
||||
/* Configure : CRC Polynomial */
|
||||
WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
|
||||
|
||||
#if defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
|
||||
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
||||
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
||||
#endif
|
||||
|
||||
#if defined (STM32F101xE) || defined (STM32F103xE)
|
||||
/* Check RevisionID value for identifying if Device is Rev Z (0x0001) in order to enable workaround for
|
||||
CRC errors wrongly detected */
|
||||
/* Pb is that ES_STM32F10xxCDE also identify an issue in Debug registers access while not in Debug mode.
|
||||
Revision ID information is only available in Debug mode, so Workaround could not be implemented
|
||||
to distinguish Rev Z devices (issue present) from more recent version (issue fixed).
|
||||
So, in case of Revison Z F101 or F103 devices, below variable should be assigned to 1 */
|
||||
uCRCErrorWorkaroundCheck = 0;
|
||||
#else
|
||||
uCRCErrorWorkaroundCheck = 0;
|
||||
#endif
|
||||
|
||||
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup SPI_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Checks if encountered CRC error could be corresponding to wrongly detected errors
|
||||
* according to SPI instance, Device type, and revision ID.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval CRC error validity (SPI_INVALID_CRC_ERROR or SPI_VALID_CRC_ERROR).
|
||||
*/
|
||||
uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
#if defined (STM32F101xE) || defined (STM32F103xE)
|
||||
/* Check how to handle this CRC error (workaround to be applied or not) */
|
||||
/* If CRC errors could be wrongly detected (issue 2.15.2 in STM32F10xxC/D/E silicon limitations ES (DocID14732 Rev 13) */
|
||||
if ( (uCRCErrorWorkaroundCheck != 0) && (hspi->Instance == SPI2) )
|
||||
{
|
||||
if (hspi->Instance->RXCRCR == 0)
|
||||
{
|
||||
return (SPI_INVALID_CRC_ERROR);
|
||||
}
|
||||
}
|
||||
return (SPI_VALID_CRC_ERROR);
|
||||
#else
|
||||
return (SPI_VALID_CRC_ERROR);
|
||||
#endif
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
Reference in New Issue
Block a user