code beautifying

This commit is contained in:
2024-03-18 12:51:57 +01:00
parent 58ae9a641a
commit fd3df973ec
13 changed files with 144 additions and 151 deletions

View File

@ -1,33 +1,76 @@
#include <string.h>
#include <stdint.h>
#include <msp430g2553.h>
#include "canvas.h"
#include "displayDriver.h"
static uint8_t canvasStorage[CANVAS_WIDTH * CANVAS_HEIGHT];
const canvas_t canvas = {
.height = CANVAS_HEIGHT,
.width = CANVAS_WIDTH,
.size = CANVAS_WIDTH * CANVAS_HEIGHT,
.canvas = canvasStorage
};
void canvasInit() {
canvasClear();
displayDriverTransferCanvas();
}
void canvasClear() {
memset(canvas.canvas, 0x80, canvas.size);
}
void canvasSetAll(uint8_t color) {
memset(canvas.canvas, color + 0x80, canvas.size);
inline static void spiSendOctet(uint8_t v) {
// wait for TX buffer empty
while (!(UC0IFG & UCB0TXIFG));
// load octet into TX buffer
UCB0TXBUF = v;
}
void canvasShow() {
displayDriverTransferCanvas();
// wait for signal waiting for data
while ((P1IN & BIT3) == 0);
for (uint8_t i = 0; i < (CANVAS_WIDTH*CANVAS_HEIGHT); i++) {
if ((*((canvas.canvas)+i) & 0x80) != 0) {
*((canvas.canvas)+i) &= ~0x80;
spiSendOctet(i);
spiSendOctet(*((canvas.canvas)+i));
}
}
spiSendOctet(0xfe);
}
void canvasInit() {
// SPI in master mode
UCB0CTL0 = UCMST;
// SPI timing config
UCB0CTL1 = UCSSEL_3;
// Faster than 8 ends up in strange communication errors
// between the both MCUs.
// With 8 the transfer of a complete 110 pixel canvas takes
// about 720us.
UCB0BR0 = 8;
UCB0BR1 = 0;
// BIT5: UCB0CLK
// BIT6: UCB0SOMI
// BIT7: UCB0SIMO
P1SEL |= BIT5 | BIT6 | BIT7;
P1SEL2 |= BIT5 | BIT6 | BIT7;
P1DIR |= BIT5 | BIT7;
// P1.3 is signal line
P1DIR &= ~BIT3;
// enable SPI module
UCB0CTL1 &= ~UCSWRST;
canvasClear();
canvasShow();
}
void canvasClear() {
memset(canvas.canvas, 0x80, CANVAS_WIDTH*CANVAS_HEIGHT);
}
void canvasSetAll(uint8_t color) {
memset(canvas.canvas, color + 0x80, CANVAS_WIDTH*CANVAS_HEIGHT);
}
void canvasSetPixel(uint8_t column, uint8_t row, uint8_t color) {