refactor SPI handling and introduce SPI CS
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@ -96,11 +96,12 @@ init:
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;; BIT3: Signal waiting for data
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mov.b #BIT0|BIT1|BIT2|BIT3, &P1DIR
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mov.b #0,&P1OUT
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;; BIT4: spi, UCB0STE
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;; BIT5: spi, UCB0CLK
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;; BIT6: spi, UCB0SOMI
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;; BIT7: spi, UCB0SIMO
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mov.b #BIT5|BIT6|BIT7, &P1SEL
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mov.b #BIT5|BIT6|BIT7, &P1SEL2
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mov.b #BIT4|BIT5|BIT6|BIT7, &P1SEL
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mov.b #BIT4|BIT5|BIT6|BIT7, &P1SEL2
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;; BIT4: long pulse
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;; BIT1: short pulse
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mov.b #BIT1|BIT4,&P2DIR
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@ -122,7 +123,7 @@ init:
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;; spi configuration
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;; USCI B to slave mode
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mov.b #UCSYNC, &UCB0CTL0
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mov.b #UCSYNC|UCMODE_2, &UCB0CTL0
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mov.b #0x00, &UCB0CTL1
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;; make sure the isr will not immediately start
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