changes
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b411a05d0e
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3
.gitignore
vendored
Normal file
3
.gitignore
vendored
Normal file
@ -0,0 +1,3 @@
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*.o
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firmware.*
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4
Makefile
4
Makefile
@ -6,13 +6,13 @@ MCU=msp430g2553
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ARTIFACT=firmware
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COMMON=-Wall -mmcu=$(MCU) -std=gnu99 -I $(TOOLCHAIN_PREFIX)/include -Os -g0 -fdata-sections -ffunction-sections
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CFLAGS=$(COMMON)
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ASFLAGS=$(COMMON)
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ASFLAGS=$(COMMON) -D__ASSEMBLER__
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LDFLAGS=-L $(TOOLCHAIN_PREFIX)/include -Wl,-Map,firmware.map -nostdlib -nostartfiles -T $(MCU).ld
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$(ARTIFACT).elf: main.o
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$(CC) -o $@ $(LDFLAGS) $^
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$(OBJDUMP) -d $(ARTIFACT).elf > $(ARTIFACT).txt
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$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt
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.c.o:
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BIN
docs/signals01.png
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BIN
docs/signals01.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 326 KiB |
113
main.S
113
main.S
@ -8,13 +8,36 @@
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#define SR r2
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.section ".rodata","a"
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screendatacnt:
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.byte 0x01
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screendata:
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.byte 0x00
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red:
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colors1:
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.byte 0b01001111
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colors2:
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.byte 0b01000111
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colors3:
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.byte 0b01000011
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.byte 0
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blue:
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.byte 0b11001111
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.byte 0b11000111
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.byte 0b11000011
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.byte 0
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green:
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.byte 0b10001111
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.byte 0b10000111
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.byte 0b10000011
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.byte 0
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;; .text is the name of the section, it is a hint for the linker to
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;; allocate the section
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;; ax: a means allocatable by linker, x means executable
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;; @progbits is a hint for the linker to allocate this section into
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;; program memory (flash)
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.section ".text","ax",@progbits
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_start:
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;; disable watchdog
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mov.w #WDTPW|WDTHOLD,&WDTCTL
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@ -29,45 +52,99 @@ _start:
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mov.w #__stack, SP
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init:
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;; configuration of GPIO Port1, use Bit6 as TA0.1
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mov.b #BIT6,&P1DIR
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mov.b #BIT6,&P1SEL
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;; configuration of GPIO Ports
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mov.b #BIT0|BIT1|BIT2,&P1DIR
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mov.b #BIT1|BIT4,&P2DIR
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mov.b #BIT1|BIT4,&P2SEL
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;; timer configuration
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;; configure and stop timer
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;; cycle time is 56.25ns
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mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TACTL
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mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL
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;; 2.0us
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mov.w #45,&TACCR0
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mov.w #45,&TA1CCR0
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;; a bit less
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mov.w #16,&TACCR1
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mov.w #10,&TA1CCR1
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mov.w #22,&TA1CCR2
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;; configure output mode for TA0.1
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; mov.w #CCIE,&TACCTL0
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; mov.w #CCIE,&TACCTL1
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mov.w #OUTMOD_7,&TACCTL1
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;; start timer in up mode
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bis.w #MC0,&TACTL
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mov.w #CCIE,&TA1CCTL0
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mov.w #OUTMOD_7,&TA1CCTL1
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mov.w #OUTMOD_7,&TA1CCTL2
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;; test data
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mov.b #0b01101111,r5
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;; initialize bit-counter for isr
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mov.b #0x01,r6
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;; initialize isr-sync register
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mov.b #0x00,r4
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;; start timer in up mode
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bis.w #MC0,&TA1CTL
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;; enable interrupts
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eint
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;; r4: synchronization between mainloop and isr
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;; r5: data byte to be handled by isr
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mainloop:
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;; prepare next byte to handle by isr
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mainloop_wait_for_isr:
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;; check bit0 in sync register
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bit #0x01,r4
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jz mainloop_wait_for_isr
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;; load data
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mov.b #0b01001111,r5
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mov.b #0x00,r4
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;; signal reload
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bis #BIT2,&P1OUT
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bic #BIT2,&P1OUT
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;; continue
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jmp mainloop
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; --- timer isr ---
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;timer0_a0_isr:
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; mov.b #BIT0,&P1OUT
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; reti
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;; r6: exclusively used by isr as bit-counter
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timer1_a0_isr:
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;; func begin marker
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bis #BIT0,&P1OUT
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;; check isr idle bit
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bit #BIT1,r4
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jnz timer1_a0_isr_exit
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;; shift msb of data register r5 into carry flag and set or reset P1.1 accordingly
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rla.b r5
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jnc timer1_a0_isr_false_bit
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bis #BIT1,&P1OUT
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jmp timer1_a0_isr_end
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timer1_a0_isr_false_bit:
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bic #BIT1,&P1OUT
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;; shift bit-counter, after eight shifts signal byte done and reset bit-counter
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timer1_a0_isr_end:
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rla.b r6
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jnc timer1_a0_isr_exit
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;; reset bit-counter
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mov.b #0x01,r6
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;; signal byte done
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mov.b #0x01,r4
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timer1_a0_isr_exit:
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;; func end marker
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bic #BIT0,&P1OUT
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reti
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;timer0_a1_isr:
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; mov.b #0,&P1OUT
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; reti
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; --- interrupt vectors ---
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; .section "__interrupt_vector_9","ax",@progbits
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; .word timer0_a1_isr
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; .section "__interrupt_vector_10","ax",@progbits
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; .word timer0_a0_isr
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.section "__interrupt_vector_14","ax",@progbits
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.word timer1_a0_isr
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;; .resetvec comes from linker
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.section ".resetvec","ax",@progbits
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