This commit is contained in:
Wolfgang Hottgenroth 2024-02-23 10:39:57 +01:00
parent b411a05d0e
commit 491a544919
4 changed files with 100 additions and 20 deletions

3
.gitignore vendored Normal file
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@ -0,0 +1,3 @@
*.o
firmware.*

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@ -6,13 +6,13 @@ MCU=msp430g2553
ARTIFACT=firmware
COMMON=-Wall -mmcu=$(MCU) -std=gnu99 -I $(TOOLCHAIN_PREFIX)/include -Os -g0 -fdata-sections -ffunction-sections
CFLAGS=$(COMMON)
ASFLAGS=$(COMMON)
ASFLAGS=$(COMMON) -D__ASSEMBLER__
LDFLAGS=-L $(TOOLCHAIN_PREFIX)/include -Wl,-Map,firmware.map -nostdlib -nostartfiles -T $(MCU).ld
$(ARTIFACT).elf: main.o
$(CC) -o $@ $(LDFLAGS) $^
$(OBJDUMP) -d $(ARTIFACT).elf > $(ARTIFACT).txt
$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt
.c.o:

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113
main.S
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@ -8,13 +8,36 @@
#define SR r2
.section ".rodata","a"
screendatacnt:
.byte 0x01
screendata:
.byte 0x00
red:
colors1:
.byte 0b01001111
colors2:
.byte 0b01000111
colors3:
.byte 0b01000011
.byte 0
blue:
.byte 0b11001111
.byte 0b11000111
.byte 0b11000011
.byte 0
green:
.byte 0b10001111
.byte 0b10000111
.byte 0b10000011
.byte 0
;; .text is the name of the section, it is a hint for the linker to
;; allocate the section
;; ax: a means allocatable by linker, x means executable
;; @progbits is a hint for the linker to allocate this section into
;; program memory (flash)
.section ".text","ax",@progbits
_start:
;; disable watchdog
mov.w #WDTPW|WDTHOLD,&WDTCTL
@ -29,45 +52,99 @@ _start:
mov.w #__stack, SP
init:
;; configuration of GPIO Port1, use Bit6 as TA0.1
mov.b #BIT6,&P1DIR
mov.b #BIT6,&P1SEL
;; configuration of GPIO Ports
mov.b #BIT0|BIT1|BIT2,&P1DIR
mov.b #BIT1|BIT4,&P2DIR
mov.b #BIT1|BIT4,&P2SEL
;; timer configuration
;; configure and stop timer
;; cycle time is 56.25ns
mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TACTL
mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL
;; 2.0us
mov.w #45,&TACCR0
mov.w #45,&TA1CCR0
;; a bit less
mov.w #16,&TACCR1
mov.w #10,&TA1CCR1
mov.w #22,&TA1CCR2
;; configure output mode for TA0.1
; mov.w #CCIE,&TACCTL0
; mov.w #CCIE,&TACCTL1
mov.w #OUTMOD_7,&TACCTL1
;; start timer in up mode
bis.w #MC0,&TACTL
mov.w #CCIE,&TA1CCTL0
mov.w #OUTMOD_7,&TA1CCTL1
mov.w #OUTMOD_7,&TA1CCTL2
;; test data
mov.b #0b01101111,r5
;; initialize bit-counter for isr
mov.b #0x01,r6
;; initialize isr-sync register
mov.b #0x00,r4
;; start timer in up mode
bis.w #MC0,&TA1CTL
;; enable interrupts
eint
;; r4: synchronization between mainloop and isr
;; r5: data byte to be handled by isr
mainloop:
;; prepare next byte to handle by isr
mainloop_wait_for_isr:
;; check bit0 in sync register
bit #0x01,r4
jz mainloop_wait_for_isr
;; load data
mov.b #0b01001111,r5
mov.b #0x00,r4
;; signal reload
bis #BIT2,&P1OUT
bic #BIT2,&P1OUT
;; continue
jmp mainloop
; --- timer isr ---
;timer0_a0_isr:
; mov.b #BIT0,&P1OUT
; reti
;; r6: exclusively used by isr as bit-counter
timer1_a0_isr:
;; func begin marker
bis #BIT0,&P1OUT
;; check isr idle bit
bit #BIT1,r4
jnz timer1_a0_isr_exit
;; shift msb of data register r5 into carry flag and set or reset P1.1 accordingly
rla.b r5
jnc timer1_a0_isr_false_bit
bis #BIT1,&P1OUT
jmp timer1_a0_isr_end
timer1_a0_isr_false_bit:
bic #BIT1,&P1OUT
;; shift bit-counter, after eight shifts signal byte done and reset bit-counter
timer1_a0_isr_end:
rla.b r6
jnc timer1_a0_isr_exit
;; reset bit-counter
mov.b #0x01,r6
;; signal byte done
mov.b #0x01,r4
timer1_a0_isr_exit:
;; func end marker
bic #BIT0,&P1OUT
reti
;timer0_a1_isr:
; mov.b #0,&P1OUT
; reti
; --- interrupt vectors ---
; .section "__interrupt_vector_9","ax",@progbits
; .word timer0_a1_isr
; .section "__interrupt_vector_10","ax",@progbits
; .word timer0_a0_isr
.section "__interrupt_vector_14","ax",@progbits
.word timer1_a0_isr
;; .resetvec comes from linker
.section ".resetvec","ax",@progbits