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merge into: wn:use_subroutine
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wn:main wn:prepare_spi_load_2 wn:prepare_spi_load wn:use_subroutine wn:broken wn:works_again
wn:works_with_led_and_static_data wn:cycler_works_include_output_stage
...
pull from: wn:broken
Branches Tags
wn:main wn:prepare_spi_load_2 wn:prepare_spi_load wn:use_subroutine wn:broken wn:works_again
wn:works_with_led_and_static_data wn:cycler_works_include_output_stage

4 Commits
use_subrou ... broken

Author SHA1 Message Date
Wolfgang Hottgenroth
7dc3d40c09 merged 2024-02-27 11:30:55 +01:00
Wolfgang Hottgenroth
9fed0c4657 use names instead of registers 2024-02-25 19:56:57 +01:00
Wolfgang Hottgenroth
a5ffaa05bd some comments 2024-02-23 22:03:31 +01:00
Wolfgang Hottgenroth
3f7d73d2fc small fix 2024-02-23 21:57:39 +01:00
1 changed files with 40 additions and 32 deletions
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72
main.S
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@ -7,6 +7,29 @@
#define SP r1 #define SP r1
#define SR r2 #define SR r2
;; --- register usage --------------------------------
;; r4: synchronization between main loop and isr
;; bit0 signals byte done from isr
;; r5: data byte to be handled by isr
;; r6: bit-counter, only used within isr
;; r7: screen data start/next pointer
;; r8: screen data end pointer
;; r9: next screen data byte, prepared in mainloop
#define SIGNAL_INIT_VALUE 0x00
#define SIGNAL_BYTE_DONE 0x01
#define SIGNAL_ISR_ENABLE 0x02
#define SIGNAL_REGISTER r4
#define DATA_BYTE_REGISTER r5
#define NEXT_DATA_BYTE_REGISTER r9
#define DATA_NEXT_ADDRESS_REGISTER r7
#define DATA_LAST_ADDRESS_REGISTER r8
#define BIT_COUNTER_REGISTER r6
#define BIT_COUNTER_INIT_VALUE 0x01
;; ---------------------------------------------------
.section ".rodata","a" .section ".rodata","a"
screendata: screendata:
@ -43,20 +66,17 @@ green:
.section ".text","ax",@progbits .section ".text","ax",@progbits
_start: _start:
;; disable watchdog ;; disable watchdog
mov.w #WDTPW|WDTHOLD,&WDTCTL mov.w #WDTPW|WDTHOLD, &WDTCTL
;; configure clock system to the highest frequency ;; configure clock system to the highest frequency
mov.b #DCO0|DCO1|DCO2,&DCOCTL mov.b #DCO0|DCO1|DCO2, &DCOCTL
mov.b #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3,&BCSCTL1 mov.b #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3, &BCSCTL1
mov.b #0,&BCSCTL2 mov.b #0, &BCSCTL2
mov.b #0,&BCSCTL3 mov.b #0, &BCSCTL3
;; initialize stack pointer with value from linker ;; initialize stack pointer with value from linker
mov.w #__stack, SP mov.w #__stack, SP
mov.w #0xaaaa, r7
mov.w #0x5555, r8
init: init:
;; configuration of GPIO Ports ;; configuration of GPIO Ports
mov.b #BIT0|BIT1|BIT2,&P1DIR mov.b #BIT0|BIT1|BIT2,&P1DIR
@ -67,16 +87,16 @@ init:
;; timer configuration ;; timer configuration
;; configure and stop timer ;; configure and stop timer
;; cycle time is 56.25ns ;; cycle time is 56.25ns
mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL mov.w #ID_0|MC_0|TACLR|TASSEL_2, &TA1CTL
;; 2.0us ;; 2.0us
mov.w #45,&TA1CCR0 mov.w #45, &TA1CCR0
;; a bit less ;; a bit less
mov.w #10,&TA1CCR1 mov.w #10, &TA1CCR1
mov.w #22,&TA1CCR2 mov.w #22, &TA1CCR2
;; configure output mode for TA0.1 ;; configure output mode for TA0.1
mov.w #CCIE,&TA1CCTL0 mov.w #CCIE, &TA1CCTL0
mov.w #OUTMOD_7,&TA1CCTL1 mov.w #OUTMOD_7, &TA1CCTL1
mov.w #OUTMOD_7,&TA1CCTL2 mov.w #OUTMOD_7, &TA1CCTL2
;; initialize bit-counter for isr ;; initialize bit-counter for isr
mov.b #0x01,r6 mov.b #0x01,r6
@ -89,15 +109,11 @@ init:
mov.w #screendataend, r8 mov.w #screendataend, r8
;; start timer in up mode ;; start timer in up mode
bis.w #MC0,&TA1CTL bis.w #MC0, &TA1CTL
;; enable interrupts ;; enable interrupts
eint eint
;; r4: synchronization between mainloop and isr
;; r5: data byte to be handled by isr
mainloop: mainloop:
;; prepare next byte to handle by isr ;; prepare next byte to handle by isr
cmp.w r7,r8 cmp.w r7,r8
@ -108,8 +124,9 @@ mainloop:
inc.w r7 inc.w r7
mainloop_wait_for_isr: mainloop_wait_for_isr:
;; check bit0 in sync register ;; check bit0 in sync register, wait for the signal from
bit #0x01,r4 ;; the isr
bit #SIGNAL_BYTE_DONE, SIGNAL_REGISTER
jz mainloop_wait_for_isr jz mainloop_wait_for_isr
;; load data ;; load data
@ -130,8 +147,6 @@ mainloop_data_done:
jmp mainloop jmp mainloop
; --- timer isr --- ; --- timer isr ---
;; r6: exclusively used by isr as bit-counter ;; r6: exclusively used by isr as bit-counter
timer1_a0_isr: timer1_a0_isr:
@ -156,7 +171,7 @@ timer1_a0_isr_end:
jnc timer1_a0_isr_exit jnc timer1_a0_isr_exit
;; reset bit-counter ;; reset bit-counter
mov.b #0x01,r6 mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
;; signal byte done ;; signal byte done
bis #0x01,r4 bis #0x01,r4
@ -171,13 +186,6 @@ timer1_a0_isr_exit:
reti reti
;timer0_a1_isr:
; reti
; --- interrupt vectors ---
; .section "__interrupt_vector_9","ax",@progbits
; .word timer0_a1_isr
.section "__interrupt_vector_14","ax",@progbits .section "__interrupt_vector_14","ax",@progbits
.word timer1_a0_isr .word timer1_a0_isr