Compare commits
4 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 7dc3d40c09 | |||
| 9fed0c4657 | |||
| a5ffaa05bd | |||
| 3f7d73d2fc |
2
Makefile
2
Makefile
@ -10,7 +10,7 @@ ASFLAGS=$(COMMON) -D__ASSEMBLER__
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LDFLAGS=-L $(TOOLCHAIN_PREFIX)/include -Wl,-Map,firmware.map -nostdlib -nostartfiles -T $(MCU).ld
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LDFLAGS=-L $(TOOLCHAIN_PREFIX)/include -Wl,-Map,firmware.map -nostdlib -nostartfiles -T $(MCU).ld
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$(ARTIFACT).elf: colors.o main.o
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$(ARTIFACT).elf: main.o
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$(CC) -o $@ $(LDFLAGS) $^
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$(CC) -o $@ $(LDFLAGS) $^
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$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt
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$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt
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38
colors.S
38
colors.S
@ -1,38 +0,0 @@
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#include "colors.h"
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#define DIMM_FACTOR 3
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.section ".rodata","a"
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;; color definitions according to
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;; https://learn.sparkfun.com/tutorials/lilypad-protosnap-plus-activity-guide/3-custom-color-mixing
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colors:
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.global colors
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;; red, green, blue, padding
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off:
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.byte 0x00, 0x00, 0x00, 0
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blue:
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.byte 0x00>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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green:
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.byte 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0
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orange:
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.byte 0xff>>DIMM_FACTOR, 0x80>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0
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rose:
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.byte 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0x80>>DIMM_FACTOR, 0
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magenta:
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.byte 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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violet:
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.byte 0x80>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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azure:
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.byte 0x00>>DIMM_FACTOR, 0x80>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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cyan:
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.byte 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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springgreen:
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.byte 0x00>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0x80>>DIMM_FACTOR, 0
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chartreuse:
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.byte 0x80>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0
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yellow:
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.byte 0xff>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0
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white:
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.byte 0xff>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0xff>>DIMM_FACTOR, 0
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red:
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.byte 0xff>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0x00>>DIMM_FACTOR, 0
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22
colors.h
22
colors.h
@ -1,22 +0,0 @@
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#ifndef _COLORS_H_
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#define _COLORS_H_
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#define _off 0x00
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#define _blue 0x01
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#define _green 0x02
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#define _orange 0x03
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#define _rose 0x04
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#define _magenta 0x05
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#define _violet 0x06
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#define _azure 0x07
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#define _cyan 0x08
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#define _springgreen 0x09
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#define _chartreuse 0x0a
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#define _yellow 0x0b
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#define _white 0x0c
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#define _red 0x0d
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#endif
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406
main.S
406
main.S
@ -1,72 +1,62 @@
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.file "main.S"
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#include <msp430g2553.h>
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#include <msp430g2553.h>
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#include "colors.h"
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#define PC r0
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#define PC r0
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#define SP r1
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#define SP r1
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#define SR r2
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#define SR r2
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;; --- register usage --------------------------------
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;; r4: synchronization between main loop and isr
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;; bit0 signals byte done from isr
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;; r5: data byte to be handled by isr
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;; r6: bit-counter, only used within isr
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;; r7: screen data start/next pointer
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;; r8: screen data end pointer
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;; r9: next screen data byte, prepared in mainloop
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;; ----------------------------------------------------
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#define SIGNAL_INIT_VALUE 0x00
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;; --- r4, r5 and r6 must not be used for any other ---
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#define SIGNAL_BYTE_DONE 0x01
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;; --- purpose ---
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;; required for communication between drawscreen and isr
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#define SIGNAL_REGISTER r4
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#define SIGNAL_OCTET_DONE 0x01
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#define SIGNAL_ISR_ENABLE 0x02
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#define SIGNAL_ISR_ENABLE 0x02
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#define SIGNAL_ALL_DATA_DONE 0x04
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#define SIGNAL_REGISTER r4
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#define SIGNAL_INIT_VALUE SIGNAL_OCTET_DONE
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;; required for handover of data between drawscreen and isr
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#define DATA_BYTE_REGISTER r5
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#define DATA_REGISTER r5
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#define NEXT_DATA_BYTE_REGISTER r9
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#define DATA_NEXT_ADDRESS_REGISTER r7
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#define DATA_LAST_ADDRESS_REGISTER r8
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;; required for sequencing of isr
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#define BIT_COUNTER_REGISTER r6
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#define BIT_COUNTER_REGISTER r6
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#define BIT_COUNTER_INIT_VALUE 0x01
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#define BIT_COUNTER_INIT_VALUE 0x01
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;; ----------------------------------------------------
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;; ---------------------------------------------------
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;; 2.48us
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.section ".rodata","a"
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#define TIMER_COMPLETE 45
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;; 1.18us
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#define TIMER_LONG 22
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;; 550ns
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#define TIMER_SHORT 10
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.macro set_data_bit
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bis #BIT0, &P1OUT
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.endm
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.macro clear_data_bit
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bic #BIT0, &P1OUT
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.endm
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.macro set_output_enable
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bis #BIT1, &P1OUT
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.endm
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.macro clear_output_enable
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bic #BIT1, &P1OUT
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.endm
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.macro set_debug
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bis #BIT2, &P1OUT
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.endm
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.macro clear_debug
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bic #BIT2, &P1OUT
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.endm
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.macro set_signal_waiting_for_data
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bis #BIT3, &P1OUT
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.endm
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.macro clear_signal_waiting_for_data
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bic #BIT3, &P1OUT
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.endm
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.section ".data"
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screendata:
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screendata:
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.rept 110 ;; number of leds in hardward
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.byte 0x01
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.byte 0
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.byte 0x03
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.endr
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.byte 0x07
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.byte 0x0f
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screendataend:
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screendataend:
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.byte 0xff
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.byte 0xff
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data_forward_pointer:
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red:
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.word 0
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colors1:
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.byte 0b01001111
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colors2:
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.byte 0b01000111
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colors3:
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.byte 0b01000011
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.byte 0
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blue:
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.byte 0b11001111
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.byte 0b11000111
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.byte 0b11000011
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.byte 0
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green:
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.byte 0b10001111
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.byte 0b10000111
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.byte 0b10000011
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.byte 0
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;; .text is the name of the section, it is a hint for the linker to
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;; .text is the name of the section, it is a hint for the linker to
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;; allocate the section
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;; allocate the section
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@ -74,319 +64,133 @@ data_forward_pointer:
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;; @progbits is a hint for the linker to allocate this section into
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;; @progbits is a hint for the linker to allocate this section into
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;; program memory (flash)
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;; program memory (flash)
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.section ".text","ax",@progbits
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.section ".text","ax",@progbits
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;; ----------------------------------------------------
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_start:
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_start:
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;; disable watchdog
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;; disable watchdog
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mov.w #WDTPW|WDTHOLD,&WDTCTL
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mov.w #WDTPW|WDTHOLD, &WDTCTL
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;; configure clock system to the highest frequency
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;; configure clock system to the highest frequency
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mov.b #DCO0|DCO1|DCO2,&DCOCTL
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mov.b #DCO0|DCO1|DCO2, &DCOCTL
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mov.b #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3,&BCSCTL1
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mov.b #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3, &BCSCTL1
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mov.b #0,&BCSCTL2
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mov.b #0, &BCSCTL2
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mov.b #0,&BCSCTL3
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mov.b #0, &BCSCTL3
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;; initialize stack pointer with value from linker
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;; initialize stack pointer with value from linker
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mov.w #__stack, SP
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mov.w #__stack, SP
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init:
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init:
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;; configuration of GPIO Ports
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;; configuration of GPIO Ports
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;; BIT0: data bit
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mov.b #BIT0|BIT1|BIT2,&P1DIR
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;; BIT1: output enable
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;; BIT2: debug
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;; BIT3: Signal waiting for data
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mov.b #BIT0|BIT1|BIT2|BIT3, &P1DIR
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mov.b #0,&P1OUT
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mov.b #0,&P1OUT
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;; BIT5: spi, UCB0CLK
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;; BIT6: spi, UCB0SOMI
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;; BIT7: spi, UCB0SIMO
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mov.b #BIT5|BIT6|BIT7, &P1SEL
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mov.b #BIT5|BIT6|BIT7, &P1SEL2
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;; BIT4: long pulse
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|
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;; BIT1: short pulse
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mov.b #BIT1|BIT4,&P2DIR
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mov.b #BIT1|BIT4,&P2DIR
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mov.b #BIT1|BIT4,&P2SEL
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mov.b #BIT1|BIT4,&P2SEL
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;; timer configuration
|
;; timer configuration
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;; configure and stop timer
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;; configure and stop timer
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;; cycle time is 56.25ns
|
;; cycle time is 56.25ns
|
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mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL
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mov.w #ID_0|MC_0|TACLR|TASSEL_2, &TA1CTL
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;; 2.0us
|
;; 2.0us
|
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mov.w #TIMER_COMPLETE,&TA1CCR0
|
mov.w #45, &TA1CCR0
|
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;; a bit less
|
;; a bit less
|
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mov.w #TIMER_SHORT,&TA1CCR1
|
mov.w #10, &TA1CCR1
|
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mov.w #TIMER_LONG,&TA1CCR2
|
mov.w #22, &TA1CCR2
|
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;; configure output mode for TA0.1
|
;; configure output mode for TA0.1
|
||||||
mov.w #CCIE,&TA1CCTL0
|
mov.w #CCIE, &TA1CCTL0
|
||||||
mov.w #OUTMOD_7,&TA1CCTL1
|
mov.w #OUTMOD_7, &TA1CCTL1
|
||||||
mov.w #OUTMOD_7,&TA1CCTL2
|
mov.w #OUTMOD_7, &TA1CCTL2
|
||||||
|
|
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;; spi configuration
|
;; initialize bit-counter for isr
|
||||||
;; USCI B to slave mode
|
mov.b #0x01,r6
|
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mov.b #UCSYNC, &UCB0CTL0
|
;; initialize isr-sync register, signal BYTE_DONE for the first start
|
||||||
mov.b #0x00, &UCB0CTL1
|
mov.b #0x01,r4
|
||||||
|
|
||||||
;; make sure the isr will not immediately start
|
;; screen data start/next into r7
|
||||||
mov.b #SIGNAL_INIT_VALUE, SIGNAL_REGISTER
|
mov.w #screendata, r7
|
||||||
|
;; screen data end into r8
|
||||||
|
mov.w #screendataend, r8
|
||||||
|
|
||||||
;; start timer in up mode
|
;; start timer in up mode
|
||||||
bis.w #MC0,&TA1CTL
|
bis.w #MC0, &TA1CTL
|
||||||
;; enable interrupts
|
;; enable interrupts
|
||||||
eint
|
eint
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
mainloop:
|
mainloop:
|
||||||
call #forwardscreen_init
|
|
||||||
call #resetscreen
|
|
||||||
|
|
||||||
mainloop_draw:
|
|
||||||
call #drawscreen
|
|
||||||
|
|
||||||
;; signal waiting for data
|
|
||||||
set_signal_waiting_for_data
|
|
||||||
|
|
||||||
;call #forwardscreen
|
|
||||||
;call #wait
|
|
||||||
call #receivedata
|
|
||||||
|
|
||||||
;; data has been received, clear signal
|
|
||||||
clear_signal_waiting_for_data
|
|
||||||
|
|
||||||
jmp mainloop_draw
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
wait:
|
|
||||||
push r11
|
|
||||||
push r12
|
|
||||||
|
|
||||||
mov.w #0x0040, r11
|
|
||||||
wait_continue_1:
|
|
||||||
mov.w #0xffff, r12
|
|
||||||
wait_continue_2:
|
|
||||||
dec.w r12
|
|
||||||
jnz wait_continue_2
|
|
||||||
dec.w r11
|
|
||||||
jnz wait_continue_1
|
|
||||||
|
|
||||||
pop r12
|
|
||||||
pop r11
|
|
||||||
ret
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
forwardscreen_init:
|
|
||||||
mov.w #screendata, &data_forward_pointer
|
|
||||||
ret
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
forwardscreen:
|
|
||||||
push r8
|
|
||||||
push r10
|
|
||||||
|
|
||||||
mov.w #screendataend, r8
|
|
||||||
mov.w data_forward_pointer, r10
|
|
||||||
mov.b #_off, @r10
|
|
||||||
inc.w r10
|
|
||||||
mov.b #_blue, @r10
|
|
||||||
cmp.w r10, r8
|
|
||||||
jnz forwardscreen_done
|
|
||||||
mov.w #screendata, r10
|
|
||||||
forwardscreen_done:
|
|
||||||
mov.w r10, data_forward_pointer
|
|
||||||
|
|
||||||
pop r10
|
|
||||||
pop r8
|
|
||||||
ret
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
resetscreen:
|
|
||||||
push r7
|
|
||||||
push r8
|
|
||||||
|
|
||||||
;; reset screen data
|
|
||||||
mov.w #screendata, r7
|
|
||||||
mov.w #screendataend, r8
|
|
||||||
resetscreen_continue:
|
|
||||||
mov.b #_off, @r7
|
|
||||||
inc.w r7
|
|
||||||
cmp.w r7, r8
|
|
||||||
jnz resetscreen_continue
|
|
||||||
|
|
||||||
pop r8
|
|
||||||
pop r7
|
|
||||||
ret
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
receivedata:
|
|
||||||
push r9
|
|
||||||
push r10
|
|
||||||
|
|
||||||
;; wait for first octet
|
|
||||||
receivedata_wait_for_control_octet:
|
|
||||||
bit #UCB0RXIFG, &UC0IFG
|
|
||||||
jz receivedata_wait_for_control_octet
|
|
||||||
|
|
||||||
;; get control or address octet from buffer register
|
|
||||||
mov.b UCB0RXBUF, r9
|
|
||||||
;; check whether value == 0xff (wait for the whole
|
|
||||||
;; set of data to fill the screendata)
|
|
||||||
cmp.b #0xff, r9
|
|
||||||
;; receive all data
|
|
||||||
jz receivedata_wait_for_all_data
|
|
||||||
;; check whether value == 0xfe (no more data)
|
|
||||||
cmp.b #0xfe, r9
|
|
||||||
;; no more data
|
|
||||||
jz receivedata_end
|
|
||||||
|
|
||||||
;; it is an address octet
|
|
||||||
receivedata_wait_for_octet:
|
|
||||||
bit #UCB0RXIFG, &UC0IFG
|
|
||||||
jz receivedata_wait_for_octet
|
|
||||||
|
|
||||||
;; get data octet from buffer register
|
|
||||||
mov.b UCB0RXBUF, r10
|
|
||||||
;; move it to the destination
|
|
||||||
mov.b r10, screendata(r9)
|
|
||||||
;; next address/control octet
|
|
||||||
jmp receivedata_wait_for_control_octet
|
|
||||||
|
|
||||||
receivedata_wait_for_all_data:
|
|
||||||
;; this is a bit dangerous, if the application controller
|
|
||||||
;; sends too few data, we are in a dead lock
|
|
||||||
|
|
||||||
receivedata_end:
|
|
||||||
pop r10
|
|
||||||
pop r9
|
|
||||||
ret
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
drawscreen:
|
|
||||||
push r7
|
|
||||||
push r8
|
|
||||||
push r9
|
|
||||||
|
|
||||||
#define DATA_NEXT_ADDRESS_REGISTER r7
|
|
||||||
#define DATA_END_ADDRESS_REGISTER r8
|
|
||||||
#define NEXT_DATA_REGISTER r9
|
|
||||||
|
|
||||||
;; initialize bit-counter for isr
|
|
||||||
mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
|
|
||||||
;; initialize isr-sync register, signal BYTE_DONE for the first start
|
|
||||||
mov.b #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
|
|
||||||
;; screen data start/next into r7
|
|
||||||
mov.w #screendata, DATA_NEXT_ADDRESS_REGISTER
|
|
||||||
;; screen data end into r8
|
|
||||||
mov.w #screendataend, DATA_END_ADDRESS_REGISTER
|
|
||||||
|
|
||||||
drawscreen_continue:
|
|
||||||
;; prepare next byte to handle by isr
|
;; prepare next byte to handle by isr
|
||||||
cmp.w DATA_NEXT_ADDRESS_REGISTER, DATA_END_ADDRESS_REGISTER
|
cmp.w r7,r8
|
||||||
jz drawscreen_data_done
|
jz mainloop_data_done
|
||||||
|
|
||||||
;; load next data byte
|
;; load next data byte
|
||||||
mov.b @DATA_NEXT_ADDRESS_REGISTER, NEXT_DATA_REGISTER
|
mov.b @r7,r9
|
||||||
inc.w DATA_NEXT_ADDRESS_REGISTER
|
inc.w r7
|
||||||
|
|
||||||
;; multiple color code by four to get color data
|
mainloop_wait_for_isr:
|
||||||
rla.b NEXT_DATA_REGISTER
|
;; check bit0 in sync register, wait for the signal from
|
||||||
rla.b NEXT_DATA_REGISTER
|
;; the isr
|
||||||
|
bit #SIGNAL_BYTE_DONE, SIGNAL_REGISTER
|
||||||
|
jz mainloop_wait_for_isr
|
||||||
|
|
||||||
|
;; load data
|
||||||
|
mov.b r9,r5
|
||||||
|
;; clear BYTE_DONE
|
||||||
|
bic #0x01, r4
|
||||||
;; enable isr
|
;; enable isr
|
||||||
bis #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
|
bis #0x02, r4
|
||||||
|
|
||||||
drawscreen_wait_for_isr_0:
|
|
||||||
;; check bit0 in sync register
|
|
||||||
bit #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
jz drawscreen_wait_for_isr_0
|
|
||||||
;; load data
|
|
||||||
mov.b colors(NEXT_DATA_REGISTER), DATA_REGISTER
|
|
||||||
;; clear BYTE_DONE
|
|
||||||
bic #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
drawscreen_wait_for_isr_1:
|
|
||||||
;; check bit0 in sync register
|
|
||||||
bit #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
jz drawscreen_wait_for_isr_1
|
|
||||||
;; load data
|
|
||||||
mov.b colors+1(NEXT_DATA_REGISTER), DATA_REGISTER
|
|
||||||
;; clear BYTE_DONE
|
|
||||||
bic #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
drawscreen_wait_for_isr_2:
|
|
||||||
;; check bit0 in sync register
|
|
||||||
bit #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
jz drawscreen_wait_for_isr_2
|
|
||||||
;; load data
|
|
||||||
mov.b colors+2(NEXT_DATA_REGISTER), DATA_REGISTER
|
|
||||||
;; clear BYTE_DONE
|
|
||||||
bic #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
|
||||||
|
|
||||||
;; continue
|
;; continue
|
||||||
jmp drawscreen_continue
|
jmp mainloop
|
||||||
|
|
||||||
drawscreen_data_done:
|
mainloop_data_done:
|
||||||
;; signal all data processed, isr finish
|
;; signal all data processed, isr finish
|
||||||
bis #SIGNAL_ALL_DATA_DONE, SIGNAL_REGISTER
|
bis #0x04, r4
|
||||||
|
bis #BIT2, &P1OUT
|
||||||
pop r9
|
;; continue
|
||||||
pop r8
|
jmp mainloop
|
||||||
pop r7
|
|
||||||
ret
|
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
; --- timer isr ---
|
; --- timer isr ---
|
||||||
;; r6: exclusively used by isr as bit-counter
|
;; r6: exclusively used by isr as bit-counter
|
||||||
shifter_isr:
|
timer1_a0_isr:
|
||||||
;; check isr enable bit
|
;; check isr enable bit
|
||||||
bit #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
|
bit #0x02,r4
|
||||||
jz shifter_isr_exit
|
jz timer1_a0_isr_exit
|
||||||
|
|
||||||
;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
|
;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
|
||||||
rla.b DATA_REGISTER
|
rla.b r5
|
||||||
jnc shifter_isr_false_bit
|
jnc timer1_a0_isr_false_bit
|
||||||
set_data_bit
|
bis #BIT0,&P1OUT
|
||||||
jmp shifter_isr_end
|
jmp timer1_a0_isr_end
|
||||||
shifter_isr_false_bit:
|
timer1_a0_isr_false_bit:
|
||||||
clear_data_bit
|
bic #BIT0,&P1OUT
|
||||||
|
|
||||||
shifter_isr_end:
|
timer1_a0_isr_end:
|
||||||
;; enable output
|
;; enable output
|
||||||
set_output_enable
|
bis #BIT1, &P1OUT
|
||||||
|
|
||||||
;; roll bit-counter
|
;; roll bit-counter
|
||||||
rla.b BIT_COUNTER_REGISTER
|
rla.b r6
|
||||||
jnc shifter_isr_exit
|
jnc timer1_a0_isr_exit
|
||||||
|
|
||||||
;; reset bit-counter
|
;; reset bit-counter
|
||||||
mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
|
mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
|
||||||
;; signal byte done
|
;; signal byte done
|
||||||
bis #SIGNAL_OCTET_DONE, SIGNAL_REGISTER
|
bis #0x01,r4
|
||||||
|
|
||||||
;; check whether all data are processed
|
bit #0x04, r4
|
||||||
bit #SIGNAL_ALL_DATA_DONE, SIGNAL_REGISTER
|
jz timer1_a0_isr_exit
|
||||||
jz shifter_isr_exit
|
|
||||||
;; disable isr
|
;; disable isr
|
||||||
bic #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
|
bic #0x02, r4
|
||||||
;; disable output
|
;; disable output
|
||||||
clear_output_enable
|
bic #BIT1, &P1OUT
|
||||||
|
|
||||||
shifter_isr_exit:
|
timer1_a0_isr_exit:
|
||||||
reti
|
reti
|
||||||
|
|
||||||
|
|
||||||
;; ----------------------------------------------------
|
|
||||||
.section "__interrupt_vector_14","ax",@progbits
|
.section "__interrupt_vector_14","ax",@progbits
|
||||||
.word shifter_isr
|
.word timer1_a0_isr
|
||||||
|
|
||||||
;; .resetvec comes from linker
|
;; .resetvec comes from linker
|
||||||
.section ".resetvec","ax",@progbits
|
.section ".resetvec","ax",@progbits
|
||||||
.word _start
|
.word _start
|
||||||
|
|
||||||
.end
|
.end
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
92
readme.md
92
readme.md
@ -1,97 +1,5 @@
|
|||||||
## Debugging
|
|
||||||
|
|
||||||
```
|
|
||||||
mspdebug rf2500 gdb
|
mspdebug rf2500 gdb
|
||||||
|
|
||||||
msp430-gdb -x firmware.gdb
|
msp430-gdb -x firmware.gdb
|
||||||
```
|
|
||||||
|
|
||||||
Attention: the gdb in the TI toolchain package is broken, use the one from Debian
|
Attention: the gdb in the TI toolchain package is broken, use the one from Debian
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
## Signals Working Cycler
|
|
||||||
|
|
||||||
These signals are related to code under tag `cycler_works_include_output_stage`.
|
|
||||||
|
|
||||||
First octets:
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Last octets:
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Schematics and legend for signals:
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
## Timing
|
|
||||||
|
|
||||||
Complete cycle: 2.48us
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Short pulse: 550ns
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
Long pulse: 1.18us
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
## Load Time
|
|
||||||
|
|
||||||
During of loading data into five LEDs: 297us
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
During of loading data into six LEDs: 297us
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
| # of LEDs | Load Time measured | calculated |
|
|
||||||
| --------- | ------------------ | ---------- |
|
|
||||||
| 5 | 297us | |
|
|
||||||
| 6 | 354us | 356.4us |
|
|
||||||
| 10 | | 594us |
|
|
||||||
| 100 | | 5.9ms |
|
|
||||||
| 200 | | 11.8ms |
|
|
||||||
|
|
||||||
|
|
||||||
## Reset Circuitry
|
|
||||||
|
|
||||||
It appears that the output voltage of the power supply raises that slow, that the MCU
|
|
||||||
will not handle the reset correctly.
|
|
||||||
|
|
||||||
The following circuitry should generate a valid reset signal far enough from the raise
|
|
||||||
of the supply voltage:
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
The circuit generates the following signals:
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#### Reference voltage (green):
|
|
||||||
|
|
||||||
```math
|
|
||||||
U_ref = 3.3V \frac{22k\Omega}{22k\Omega + 10k\Omega} = 2.2V
|
|
||||||
```
|
|
||||||
|
|
||||||
|
|
||||||
#### Trigger voltage (purple):
|
|
||||||
|
|
||||||
```math
|
|
||||||
U_trigg = 3.3V \frac{330k\Omega}{330k\Omega + 82k\Omega} = 2.64V
|
|
||||||
```
|
|
||||||
|
|
||||||
|
|
||||||
#### RC constant:
|
|
||||||
|
|
||||||
```math
|
|
||||||
\tau = 82k\Omega \cdot 100nF = 8.2ms
|
|
||||||
```
|
|
||||||
|
|||||||
Reference in New Issue
Block a user