refactor names, 3

colors.S

@@ -3,9 +3,9 @@
   .section ".rodata","a"
 screendata_tmpl:
   .global screendata_tmpl
-  .byte _red
+  .byte _blue
   .byte _off
-  .byte _white
+  .byte _yellow
 screendataend_tmpl:
   .byte   0xff
 

main.S

@@ -8,6 +8,15 @@
 #define SR r2
 
 
+#define SIGNAL_REGISTER r4
+#define DATA_NEXT_ADDRESS_REGISTER r7
+#define DATA_END_ADDRESS_REGISTER r8
+#define DATA_REGISTER r5
+#define NEXT_DATA_REGISTER r9
+
+#define BIT_COUNTER_REGISTER r6
+
+
   .section ".data"
 screendata:
   .rept 3
@@ -74,14 +83,14 @@ init:
   mov.w   #OUTMOD_7,&TA1CCTL2
 
   ;; initialize bit-counter for isr
-  mov.b   #0x01,r6
+  mov.b   #0x01, BIT_COUNTER_REGISTER
   ;; initialize isr-sync register, signal BYTE_DONE for the first start
-  mov.b   #0x01,r4
+  mov.b   #0x01, SIGNAL_REGISTER
 
   ;; screen data start/next into r7
-  mov.w   #screendata, r7
+  mov.w   #screendata, DATA_NEXT_ADDRESS_REGISTER
   ;; screen data end into r8
-  mov.w   #screendataend, r8
+  mov.w   #screendataend, DATA_END_ADDRESS_REGISTER
 
   ;; start timer in up mode
   bis.w   #MC0,&TA1CTL
@@ -95,51 +104,51 @@ init:
   ;; r5: data byte to be handled by isr
 mainloop:
   ;; prepare next byte to handle by isr
-  cmp.w   r7,r8
+  cmp.w   DATA_NEXT_ADDRESS_REGISTER, DATA_END_ADDRESS_REGISTER
   jz      mainloop_data_done
 
   ;; load next data byte
-  mov.b   @r7,r9
-  inc.w   r7
+  mov.b   @DATA_NEXT_ADDRESS_REGISTER, NEXT_DATA_REGISTER
+  inc.w   DATA_NEXT_ADDRESS_REGISTER
 
   ;; multiple color code by four to get color data
-  rla.b   r9
-  rla.b   r9
+  rla.b   NEXT_DATA_REGISTER
+  rla.b   NEXT_DATA_REGISTER
 
   ;; enable isr
-  bis     #0x02, r4
+  bis     #0x02, SIGNAL_REGISTER
 
 mainloop_wait_for_isr_0:
   ;; check bit0 in sync register
-  bit     #0x01,r4
+  bit     #0x01, SIGNAL_REGISTER
   jz      mainloop_wait_for_isr_0
   ;; load data
-  mov.b   colors(r9), r5
+  mov.b   colors(NEXT_DATA_REGISTER), DATA_REGISTER
   ;; clear BYTE_DONE
-  bic     #0x01, r4
+  bic     #0x01,  SIGNAL_REGISTER
 mainloop_wait_for_isr_1:
   ;; check bit0 in sync register
-  bit     #0x01,r4
+  bit     #0x01, SIGNAL_REGISTER
   jz      mainloop_wait_for_isr_1
   ;; load data
-  mov.b   colors+1(r9), r5
+  mov.b   colors+1(NEXT_DATA_REGISTER), DATA_REGISTER
   ;; clear BYTE_DONE
-  bic     #0x01, r4
+  bic     #0x01,  SIGNAL_REGISTER
 mainloop_wait_for_isr_2:
   ;; check bit0 in sync register
-  bit     #0x01,r4
+  bit     #0x01, SIGNAL_REGISTER
   jz      mainloop_wait_for_isr_2
   ;; load data
-  mov.b   colors+2(r9), r5
+  mov.b   colors+2(NEXT_DATA_REGISTER), DATA_REGISTER
   ;; clear BYTE_DONE
-  bic     #0x01, r4
+  bic     #0x01,  SIGNAL_REGISTER
 
   ;; continue
   jmp     mainloop
 
 mainloop_data_done:
   ;; signal all data processed, isr finish
-  bis     #0x04, r4
+  bis     #0x04,  SIGNAL_REGISTER
   bis     #BIT2, &P1OUT
   ;; continue
   jmp     mainloop
@@ -151,11 +160,11 @@ mainloop_data_done:
   ;; r6: exclusively used by isr as bit-counter
 timer1_a0_isr:
   ;; check isr enable bit
-  bit     #0x02,r4
+  bit     #0x02, SIGNAL_REGISTER
   jz      timer1_a0_isr_exit
 
   ;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
-  rla.b   r5
+  rla.b   DATA_REGISTER
   jnc     timer1_a0_isr_false_bit
   bis     #BIT0,&P1OUT
   jmp     timer1_a0_isr_end
@@ -167,18 +176,19 @@ timer1_a0_isr_end:
   bis     #BIT1, &P1OUT
 
   ;; roll bit-counter
-  rla.b   r6
+  rla.b   BIT_COUNTER_REGISTER
   jnc     timer1_a0_isr_exit
 
   ;; reset bit-counter
-  mov.b   #0x01,r6
+  mov.b   #0x01, BIT_COUNTER_REGISTER
   ;; signal byte done
-  bis     #0x01,r4
+  bis     #0x01, SIGNAL_REGISTER
 
-  bit     #0x04, r4
+  ;; check whether all data are processed
+  bit     #0x04,  SIGNAL_REGISTER
   jz      timer1_a0_isr_exit
   ;; disable isr
-  bic     #0x02, r4
+  bic     #0x02,  SIGNAL_REGISTER
   ;; disable output
   bic     #BIT1, &P1OUT