208 lines
4.8 KiB
ArmAsm
208 lines
4.8 KiB
ArmAsm
.file "main.S"
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#include <msp430g2553.h>
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#include "colors.h"
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#define PC r0
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#define SP r1
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#define SR r2
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#define SIGNAL_REGISTER r4
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#define DATA_NEXT_ADDRESS_REGISTER r7
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#define DATA_END_ADDRESS_REGISTER r8
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#define DATA_REGISTER r5
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#define NEXT_DATA_REGISTER r9
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#define BIT_COUNTER_REGISTER r6
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.section ".data"
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screendata:
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.rept 3
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.byte 0
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.endr
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screendataend:
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.byte 0xff
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.section ".rodata"
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.extern screendata_tmpl
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.extern colors
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;; .text is the name of the section, it is a hint for the linker to
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;; allocate the section
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;; ax: a means allocatable by linker, x means executable
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;; @progbits is a hint for the linker to allocate this section into
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;; program memory (flash)
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.section ".text","ax",@progbits
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_start:
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;; disable watchdog
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mov.w #WDTPW|WDTHOLD,&WDTCTL
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;; configure clock system to the highest frequency
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mov.b #DCO0|DCO1|DCO2,&DCOCTL
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mov.b #XT2OFF|RSEL0|RSEL1|RSEL2|RSEL3,&BCSCTL1
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mov.b #0,&BCSCTL2
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mov.b #0,&BCSCTL3
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;; initialize stack pointer with value from linker
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mov.w #__stack, SP
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;; ----------------------------------------------
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;; load data from template area in rom into ram
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mov.w #screendata, r7
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mov.w #screendataend, r8
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mov.w #screendata_tmpl, r9
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_start_load_next:
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mov.b @r9, @r7
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inc.w r7
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inc.w r9
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cmp.w r7, r8
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jnz _start_load_next
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;; ----------------------------------------------
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init:
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;; configuration of GPIO Ports
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mov.b #BIT0|BIT1|BIT2,&P1DIR
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mov.b #0,&P1OUT
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mov.b #BIT1|BIT4,&P2DIR
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mov.b #BIT1|BIT4,&P2SEL
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;; timer configuration
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;; configure and stop timer
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;; cycle time is 56.25ns
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mov.w #ID_0|MC_0|TACLR|TASSEL_2,&TA1CTL
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;; 2.0us
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mov.w #45,&TA1CCR0
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;; a bit less
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mov.w #10,&TA1CCR1
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mov.w #22,&TA1CCR2
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;; configure output mode for TA0.1
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mov.w #CCIE,&TA1CCTL0
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mov.w #OUTMOD_7,&TA1CCTL1
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mov.w #OUTMOD_7,&TA1CCTL2
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;; initialize bit-counter for isr
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mov.b #0x01, BIT_COUNTER_REGISTER
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;; initialize isr-sync register, signal BYTE_DONE for the first start
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mov.b #0x01, SIGNAL_REGISTER
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;; screen data start/next into r7
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mov.w #screendata, DATA_NEXT_ADDRESS_REGISTER
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;; screen data end into r8
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mov.w #screendataend, DATA_END_ADDRESS_REGISTER
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;; start timer in up mode
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bis.w #MC0,&TA1CTL
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;; enable interrupts
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eint
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;; r4: synchronization between mainloop and isr
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;; r5: data byte to be handled by isr
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mainloop:
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;; prepare next byte to handle by isr
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cmp.w DATA_NEXT_ADDRESS_REGISTER, DATA_END_ADDRESS_REGISTER
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jz mainloop_data_done
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;; load next data byte
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mov.b @DATA_NEXT_ADDRESS_REGISTER, NEXT_DATA_REGISTER
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inc.w DATA_NEXT_ADDRESS_REGISTER
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;; multiple color code by four to get color data
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rla.b NEXT_DATA_REGISTER
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rla.b NEXT_DATA_REGISTER
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;; enable isr
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bis #0x02, SIGNAL_REGISTER
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mainloop_wait_for_isr_0:
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;; check bit0 in sync register
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_0
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;; load data
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mov.b colors(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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mainloop_wait_for_isr_1:
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;; check bit0 in sync register
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_1
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;; load data
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mov.b colors+1(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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mainloop_wait_for_isr_2:
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;; check bit0 in sync register
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_2
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;; load data
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mov.b colors+2(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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;; continue
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jmp mainloop
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mainloop_data_done:
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;; signal all data processed, isr finish
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bis #0x04, SIGNAL_REGISTER
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bis #BIT2, &P1OUT
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;; continue
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jmp mainloop
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; --- timer isr ---
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;; r6: exclusively used by isr as bit-counter
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timer1_a0_isr:
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;; check isr enable bit
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bit #0x02, SIGNAL_REGISTER
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jz timer1_a0_isr_exit
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;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
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rla.b DATA_REGISTER
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jnc timer1_a0_isr_false_bit
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bis #BIT0,&P1OUT
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jmp timer1_a0_isr_end
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timer1_a0_isr_false_bit:
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bic #BIT0,&P1OUT
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timer1_a0_isr_end:
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;; enable output
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bis #BIT1, &P1OUT
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;; roll bit-counter
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rla.b BIT_COUNTER_REGISTER
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jnc timer1_a0_isr_exit
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;; reset bit-counter
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mov.b #0x01, BIT_COUNTER_REGISTER
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;; signal byte done
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bis #0x01, SIGNAL_REGISTER
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;; check whether all data are processed
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bit #0x04, SIGNAL_REGISTER
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jz timer1_a0_isr_exit
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;; disable isr
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bic #0x02, SIGNAL_REGISTER
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;; disable output
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bic #BIT1, &P1OUT
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timer1_a0_isr_exit:
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reti
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.section "__interrupt_vector_14","ax",@progbits
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.word timer1_a0_isr
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;; .resetvec comes from linker
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.section ".resetvec","ax",@progbits
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.word _start
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.end
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