note definitions

sound-driver/main.c

@@ -3,6 +3,43 @@
 #include <stdlib.h>
 
 
+#define ADDR_DATA_REG P2OUT
+#define BUS_CTRL_REG P1OUT
+#define BC1 BIT0
+#define BDIR BIT1
+#define _CS BIT3
+
+#define R0 0
+#define R1 1
+#define R2 2
+#define R3 3
+#define R4 4
+#define R5 5
+#define R6 6
+#define R7 7
+#define R10 010
+#define R11 011
+#define R12 012
+#define R13 013
+#define R14 014
+#define R15 015
+
+inline static void BUS_OP_ENABLE_CS() {
+  BUS_CTRL_REG &= ~_CS;
+}
+inline static void BUS_OP_DISABLE_CS() {
+  BUS_CTRL_REG |= _CS;
+}
+inline static void BUS_OP_NACT() {
+  BUS_CTRL_REG &= ~(BDIR | BC1);
+}
+inline static void BUS_OP_INTAK() {
+  BUS_CTRL_REG |= BDIR | BC1;
+}
+inline static void BUS_OP_DWS() {
+  BUS_CTRL_REG |= BDIR;
+  BUS_CTRL_REG &= ~BC1;
+}
 
 void __attribute__ ((interrupt (USCIAB0RX_VECTOR))) receive() {
   if (UC0IFG & UCB0RXIFG) {
@@ -11,6 +48,55 @@ void __attribute__ ((interrupt (USCIAB0RX_VECTOR))) receive() {
 }
 
 
+static void delay() {
+asm volatile (
+    "push r12\n"
+    "mov.w #5, r12\n"
+    "loop:\n"
+    "dec.w r12\n"
+    "jnz loop\n"
+    "pop r12\n"
+);
+}
+
+static void writePSG(uint8_t address, uint8_t data) {
+  // according to "State Timing" (p. 15) of datasheet
+
+  // select chip
+  //BUS_OP_ENABLE_CS();
+
+  // put bus into inactive state
+  BUS_OP_NACT();
+
+  // put address on bus
+  ADDR_DATA_REG = address;
+
+  // address latch mode
+  BUS_OP_INTAK();
+
+  // latch address
+  BUS_OP_NACT();
+
+  // put data on bus
+  ADDR_DATA_REG = data;
+  
+  // set write to psg
+  BUS_OP_DWS();
+
+  // set inactive again
+  BUS_OP_NACT();
+
+  // deselect chip
+  //BUS_OP_DISABLE_CS();
+}
+
+static void writeFrequency(uint8_t channel, uint16_t frequencyCode) {
+  uint8_t fine = frequencyCode & 0x00ff;
+  uint8_t coarse = (frequencyCode >> 8) & 0x000f;
+  writePSG(R0 + (channel * 2), fine);
+  writePSG(R1 + (channel * 2), coarse);
+}
+
 int main() {
   WDTCTL = WDTPW | WDTHOLD;
 
@@ -35,9 +121,89 @@ int main() {
   // enable RX interrupt
   UC0IE |= UCB0RXIE;
 
+  // address/data bus
+  P2DIR = 0xff;
+  P2SEL = 0;
+  P2SEL2 = 0;
+
+  // sound chip reset
+  // BIT2: /RST
+  P1DIR |= BIT2;
+
+  // put sound chip into reset state
+  P1OUT &= ~BIT2;
+  delay();
+  delay();
+  delay();
+  
+  // bus control lines
+  // BIT0: BC1
+  // BIT1: BDIR
+  // BIT3: /CS
+  P1DIR |= BIT0 | BIT1 | BIT3;
+
+  // put bus into inactive state
+  BUS_CTRL_REG &= ~(BDIR | BC1);
+  BUS_CTRL_REG |= _CS;
+  
+  // release sound chip from reset state
+  P1OUT |= BIT2;
+  delay();
+  delay();
+  delay();
+  
 
   __enable_interrupt();
 
+
+
+  BUS_OP_ENABLE_CS();
+
+  /*
+  // single tone
+  writePSG(R0, 0376);
+  writePSG(R1, 0);
+  writePSG(R7, 076);
+  writePSG(R10, 03);
+  */
+
+  /*
+  // gun shot
+  writePSG(R6, 017);
+  writePSG(R7, 007);
+  writePSG(R10, 020);
+  writePSG(R11, 020);
+  writePSG(R12, 020);
+  writePSG(R14, 020);
+  writePSG(R15, 0);
+  */
+
+  /*
+  // explosion
+  writePSG(R6, 0);
+  writePSG(R7, 007);
+  writePSG(R10, 020);
+  writePSG(R11, 020);
+  writePSG(R12, 020);
+  writePSG(R14, 070);
+  writePSG(R15, 0);
+  */
+
+  /*
+  // Akkord
+  writeFrequency(0, 01527);
+  writeFrequency(1, 01247);
+  writeFrequency(2, 01073);
+  writePSG(R7, 0b11111000);
+  writePSG(R10, 03);
+  writePSG(R11, 03);
+  writePSG(R12, 03);
+  */
+
+
+  BUS_OP_DISABLE_CS();
+
+
   while (1) {
   }
 }

sound-driver/notes.h

@@ -0,0 +1,114 @@
+#ifndef _NOTES_H_
+#define _NOTES_H_
+
+// frequency codes according to AY3-8910 datasheet
+typedef enum {
+  C1  = 06535,
+  C_1 = 06234,
+  D1  = 05747,
+  D_1 = 05474,
+  E1  = 05233,
+  F1  = 05002,
+  F_1 = 04563,
+  G1  = 04353,
+  G_1 = 04153,
+  A1  = 03762,
+  A_1 = 03600,
+  B1  = 03424,
+  C2  = 03256,
+  C_2 = 03116,
+  D2  = 02764,
+  D_2 = 02636,
+  E2  = 02515,
+  F2  = 02401,
+  F_2 = 02271,
+  G2  = 02165,
+  G_2 = 02065,
+  A2  = 01771,
+  A_2 = 01700,
+  B2  = 01612,
+  C3  = 01527,
+  C_3 = 01447,
+  D3  = 01372,
+  D_3 = 01317,
+  E3  = 01247,
+  F3  = 01201,
+  F_3 = 01135,
+  G3  = 01073,
+  G_3 = 01033,
+  A3  = 00774,
+  A_3 = 00740,
+  B3  = 00705,
+  C4  = 00654,
+  C_4 = 00624,
+  D4  = 00575,
+  D_4 = 00550,
+  E4  = 00523,
+  F4  = 00500,
+  F_4 = 00456,
+  G4  = 00435,
+  G_4 = 00415,
+  A4  = 00376,
+  A_4 = 00360,
+  B_4 = 00342,
+  C5  = 00326,
+  C_5 = 00312,
+  D5  = 00276,
+  D_5 = 00264,
+  E5  = 00252,
+  F5  = 00240,
+  F_5 = 00227,
+  G5  = 00217,
+  G_5 = 00207,
+  A5  = 00177,
+  A_5 = 00170,
+  B5  = 00161,
+  C6  = 00153,
+  C_6 = 00145,
+  D6  = 00137,
+  D_6 = 00132,
+  E6  = 00125,
+  F6  = 00120,
+  F_6 = 00114,
+  G6  = 00107,
+  G_6 = 00103,
+  A6  = 00100,
+  A_6 = 00074,
+  B6  = 00071,
+  C7  = 00065,
+  C_7 = 00062,
+  D7  = 00060,
+  D_7 = 00055,
+  E7  = 00052,
+  F7  = 00050,
+  F_7 = 00046,
+  G7  = 00044,
+  G_7 = 00042,
+  A7  = 00040,
+  A_7 = 00036,
+  B7  = 00034,
+  C8  = 00033,
+  C_8 = 00031,
+  D8  = 00030,
+  D_8 = 00026,
+  E8  = 00025,
+  F8  = 00024,
+  F_8 = 00023,
+  G8  = 00022,
+  G_8 = 00021,
+  A8  = 00020,
+  A_8 = 00017,
+  B8  = 00016
+} t_note;
+
+// length of notes in multiples of 25ms
+typedef enum {
+  L_1 = 80,
+  L_1_2 = 40,
+  L_1_4 = 20,
+  L_1_8 = 10,
+  L_1_16 = 5
+} t_noteLength;
+
+
+#endif // _NOTES_H_