refactor names, 3
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2435cee771
commit
e1b7c328f8
4
colors.S
4
colors.S
@ -3,9 +3,9 @@
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.section ".rodata","a"
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screendata_tmpl:
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.global screendata_tmpl
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.byte _blue
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.byte _off
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.byte _off
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.byte _green
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.byte _yellow
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screendataend_tmpl:
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.byte 0xff
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37
main.S
37
main.S
@ -9,8 +9,13 @@
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#define SIGNAL_REGISTER r4
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#define DATA_NEXT_REGISTER r7
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#define DATA_END_REGISTER r8
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#define DATA_NEXT_ADDRESS_REGISTER r7
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#define DATA_END_ADDRESS_REGISTER r8
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#define DATA_REGISTER r5
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#define NEXT_DATA_REGISTER r9
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#define BIT_COUNTER_REGISTER r6
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.section ".data"
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screendata:
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@ -78,14 +83,14 @@ init:
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mov.w #OUTMOD_7,&TA1CCTL2
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;; initialize bit-counter for isr
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mov.b #0x01,r6
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mov.b #0x01, BIT_COUNTER_REGISTER
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;; initialize isr-sync register, signal BYTE_DONE for the first start
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mov.b #0x01, SIGNAL_REGISTER
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;; screen data start/next into r7
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mov.w #screendata, DATA_NEXT_REGISTER
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mov.w #screendata, DATA_NEXT_ADDRESS_REGISTER
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;; screen data end into r8
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mov.w #screendataend, DATA_END_REGISTER
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mov.w #screendataend, DATA_END_ADDRESS_REGISTER
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;; start timer in up mode
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bis.w #MC0,&TA1CTL
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@ -99,16 +104,16 @@ init:
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;; r5: data byte to be handled by isr
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mainloop:
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;; prepare next byte to handle by isr
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cmp.w DATA_NEXT_REGISTER, DATA_END_REGISTER
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cmp.w DATA_NEXT_ADDRESS_REGISTER, DATA_END_ADDRESS_REGISTER
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jz mainloop_data_done
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;; load next data byte
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mov.b @DATA_NEXT_REGISTER,r9
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inc.w DATA_NEXT_REGISTER
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mov.b @DATA_NEXT_ADDRESS_REGISTER, NEXT_DATA_REGISTER
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inc.w DATA_NEXT_ADDRESS_REGISTER
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;; multiple color code by four to get color data
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rla.b r9
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rla.b r9
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rla.b NEXT_DATA_REGISTER
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rla.b NEXT_DATA_REGISTER
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;; enable isr
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bis #0x02, SIGNAL_REGISTER
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@ -118,7 +123,7 @@ mainloop_wait_for_isr_0:
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_0
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;; load data
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mov.b colors(r9), r5
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mov.b colors(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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mainloop_wait_for_isr_1:
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@ -126,7 +131,7 @@ mainloop_wait_for_isr_1:
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_1
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;; load data
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mov.b colors+1(r9), r5
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mov.b colors+1(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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mainloop_wait_for_isr_2:
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@ -134,7 +139,7 @@ mainloop_wait_for_isr_2:
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bit #0x01, SIGNAL_REGISTER
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jz mainloop_wait_for_isr_2
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;; load data
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mov.b colors+2(r9), r5
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mov.b colors+2(NEXT_DATA_REGISTER), DATA_REGISTER
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;; clear BYTE_DONE
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bic #0x01, SIGNAL_REGISTER
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@ -159,7 +164,7 @@ timer1_a0_isr:
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jz timer1_a0_isr_exit
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;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
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rla.b r5
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rla.b DATA_REGISTER
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jnc timer1_a0_isr_false_bit
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bis #BIT0,&P1OUT
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jmp timer1_a0_isr_end
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@ -171,11 +176,11 @@ timer1_a0_isr_end:
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bis #BIT1, &P1OUT
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;; roll bit-counter
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rla.b r6
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rla.b BIT_COUNTER_REGISTER
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jnc timer1_a0_isr_exit
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;; reset bit-counter
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mov.b #0x01,r6
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mov.b #0x01, BIT_COUNTER_REGISTER
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;; signal byte done
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bis #0x01, SIGNAL_REGISTER
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