This commit is contained in:
Wolfgang Hottgenroth 2024-06-13 15:04:55 +02:00
parent dd7fc7ebd1
commit 9e78f9a0cd

View File

@ -10,6 +10,7 @@
#define PORT_LATI0_BIT BIT2
#define PORT_LATI1_BIT BIT3
.altmacro
.macro set_data_bit
bic #PORT_SID_BIT, &PORT_REG
@ -45,22 +46,11 @@ genShifter:
// R12 aka CHIP_ID_REGISTER: chip id, 0 or 1
// R13 aka DATA_REGISTER: frequency code, full 16 bit
data_cycle 0
data_cycle 1
data_cycle 2
data_cycle 3
data_cycle 4
data_cycle 5
data_cycle 6
data_cycle 7
data_cycle 8
data_cycle 9
data_cycle a
data_cycle b
data_cycle c
data_cycle d
data_cycle e
data_cycle f
.set counter, 0
.rept 16
data_cycle %counter
.set counter, counter + 1
.endr
tst.w CHIP_ID_REGISTER
jnz genShifter_chip_1