filter
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parent
b005b39025
commit
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2
Makefile
2
Makefile
@ -12,7 +12,7 @@ ASFLAGS=$(COMMONFLAGS) -D__ASSEMBLER__
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LDFLAGS=-mmcu=$(MCU) -L $(TOOLCHAIN_PREFIX)/include
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$(ARTIFACT).elf: main.o scheduler.o
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$(ARTIFACT).elf: main.o scheduler.o psg.o
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$(CC) -o $@ $(LDFLAGS) $^
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$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt
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80
docs/filter1.json
Normal file
80
docs/filter1.json
Normal file
@ -0,0 +1,80 @@
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{
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"Name": "filter1",
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"Description": "for 76489",
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"Tool": "FW",
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"Version": "1.2",
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"Design": {
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"visitedTabs": [
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"filter-type",
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"specifications",
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"components",
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"tolerances",
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"next-steps"
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],
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"filterType": "lowPass",
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"specifications": {
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"gain": 0,
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"gainUnit": "dB",
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"passbandAttenuation": -3,
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"passbandFrequency": 20000,
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"stopbandAttenuation": -40,
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"stopbandFrequency": 40000,
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"filterResponseValue": 0.02,
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"filterResponseSlider": "44"
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},
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"components": {
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"vsPlus": 12,
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"vsMinus": -12,
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"optimization": "RecommendedSpecificComponents",
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"optimizationPreference": "specific",
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"compensateForGbw": false,
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"preferredAlgorithms": {
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"sallenKey|lowPass": "lowpassV2"
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},
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"stages": [
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{
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"stageLetter": "A",
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"componentSizing": 86,
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"gain": -1,
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"gainEnabled": false,
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"implementation": "sallenKey",
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"opAmps": "LT1012"
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},
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{
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"stageLetter": "B",
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"componentSizing": 90,
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"gain": -1,
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"gainEnabled": false,
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"implementation": "sallenKey",
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"opAmps": "LT1012"
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},
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{
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"stageLetter": "C",
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"componentSizing": 83,
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"gain": -1,
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"gainEnabled": false,
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"implementation": "sallenKey",
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"opAmps": "LT1012"
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}
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],
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"recommendedAmps": [],
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"sortOrder": [
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0,
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1,
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2
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]
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},
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"tolerances": {
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"resistorTolerance": "5%",
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"capacitorTolerance": "10%",
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"inductorTolerance": "5%",
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"opAmpGbwTolerance": "20%",
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"resistorPreferredSeries": "E6",
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"capacitorPreferredSeries": "E6",
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"inductorPreferredSeries": "E12"
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},
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"nextSteps": {}
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},
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"CreatedDate": "2024-06-02 09:05:58 PM",
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"UpdatedDate": "2024-06-02 09:05:58 PM"
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}
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3
main.c
3
main.c
@ -3,6 +3,7 @@
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#include <stdlib.h>
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#include "scheduler.h"
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#include "psg.h"
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int main() {
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WDTCTL = WDTPW | WDTHOLD;
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@ -18,6 +19,8 @@ int main() {
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schInit();
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psgInit();
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__enable_interrupt();
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66
psg.c
66
psg.c
@ -23,9 +23,9 @@ const uint16_t frequencyCodes[8][12] = {
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#define BUS_CTRL_REG P1OUT
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#define BUS_CTRL_IN_REG P1IN
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#define _CS0 BIT1
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#define _CS1 BIT2
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#define _WE BIT3
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#define READY BIT4
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#define _WE BIT2
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#define READY BIT3
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#define _CS1 BIT4
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#define CHANNEL_A_PERIOD_ADDR 0
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#define CHANNEL_A_ATTEN_ADDR 1
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@ -36,8 +36,6 @@ const uint16_t frequencyCodes[8][12] = {
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#define IGNORE_OCTET 0xff
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uint8_t psgAmplitudeShadowValue[3];
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static void delay() {
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asm volatile (
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"push r12\n"
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@ -73,13 +71,13 @@ inline static void WRITE_CYCLE(uint8_t chipNo) {
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delay();
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}
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static void psgWrite(uint8_t chipNo, uint8_t value) {
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ADDR_DATA_REG = value;
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WRITE_CYCLE(chipNo);
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}
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//static void psgWrite(uint8_t chipNo, uint8_t value) {
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// ADDR_DATA_REG = value;
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// WRITE_CYCLE(chipNo);
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//}
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static void psgWriteFrequency(uint8_t channel, uint16_t frequencyCode) {
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uint8_t chipNo = channel / 3;
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static void psgWriteFrequency(uint8_t chip, uint8_t channel, uint16_t frequencyCode) {
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uint8_t chipNo = chip;
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uint8_t regAddr = (channel % 3) * 2;
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// bit order in frequncyCode and order in octet on data bus are reversed
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@ -110,9 +108,8 @@ static void psgWriteFrequency(uint8_t channel, uint16_t frequencyCode) {
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WRITE_CYCLE(chipNo);
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}
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void psgAmplitude(uint8_t channel, uint8_t volume) {
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psgAmplitudeShadowValue[channel] = volume;
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uint8_t chipNo = channel / 3;
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void psgAmplitude(uint8_t chip, uint8_t channel, uint8_t volume) {
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uint8_t chipNo = chip;
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uint8_t regAddr = ((channel % 3) * 2) + 1;
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uint8_t attenuation = 15 - volume;
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@ -130,14 +127,12 @@ void psgAmplitude(uint8_t channel, uint8_t volume) {
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WRITE_CYCLE(chipNo);
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}
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void psgPlayTone(uint8_t channel, uint8_t volume, t_octave octave, t_note note) {
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void psgPlayTone(uint8_t chip, uint8_t channel, uint8_t volume, t_octave octave, t_note note) {
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if (note == e_Pause) {
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psgAmplitude(channel, 0);
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psgAmplitude(chip, channel, 0);
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} else {
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// if (psgAmplitudeShadowValue[channel] == 0) {
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psgAmplitude(channel, volume);
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// }
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psgWriteFrequency(channel, frequencyCodes[octave][note]);
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psgAmplitude(chip, channel, volume);
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psgWriteFrequency(chip, channel, frequencyCodes[octave][note]);
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}
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}
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@ -150,22 +145,25 @@ void psgInit() {
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// bus control lines
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// output:
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// BIT1: /CS chip 1
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// BIT2: /CS chip 2
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// BIT3: /WE
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// BIT4: /CS chip 2
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// BIT2: /WE
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// input:
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// BIT4: READY
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P1DIR |= BIT1 | BIT2 | BIT3;
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P1DIR &= ~BIT4;
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// BIT3: READY
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P1DIR |= BIT1 | BIT2 | BIT4;
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P1DIR &= ~BIT3;
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// immediately disable all outputs, all are active low
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P1OUT |= BIT1 | BIT2 | BIT3;
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P1OUT |= BIT1 | BIT2 | BIT4;
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psgAmplitude(0, 0, 0);
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psgAmplitude(0, 1, 0);
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psgAmplitude(0, 2, 0);
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psgAmplitude(0, 3, 0); // noise
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psgAmplitude(1, 0, 0);
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psgAmplitude(1, 1, 0);
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psgAmplitude(1, 2, 0);
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psgAmplitude(1, 3, 0); // noise
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// shutdown all channels including noise
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psgWrite(0, 0b11111001);
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psgWrite(0, 0b11111101);
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psgWrite(0, 0b11111011);
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psgWrite(0, 0b11111111);
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// psgPlayTone(0, 5, e_O_3, e_A);
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psgAmplitude(0, 3);
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psgPlayTone(0, 0, 15, e_O_4, e_C);
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psgPlayTone(1, 0, 15, e_O_3, e_C);
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}
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