This commit is contained in:
Wolfgang Hottgenroth 2024-06-02 21:06:52 +02:00
parent b005b39025
commit 72b36d5a08
4 changed files with 116 additions and 35 deletions

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@ -12,7 +12,7 @@ ASFLAGS=$(COMMONFLAGS) -D__ASSEMBLER__
LDFLAGS=-mmcu=$(MCU) -L $(TOOLCHAIN_PREFIX)/include LDFLAGS=-mmcu=$(MCU) -L $(TOOLCHAIN_PREFIX)/include
$(ARTIFACT).elf: main.o scheduler.o $(ARTIFACT).elf: main.o scheduler.o psg.o
$(CC) -o $@ $(LDFLAGS) $^ $(CC) -o $@ $(LDFLAGS) $^
$(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt $(OBJDUMP) -D $(ARTIFACT).elf > $(ARTIFACT).txt

80
docs/filter1.json Normal file
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@ -0,0 +1,80 @@
{
"Name": "filter1",
"Description": "for 76489",
"Tool": "FW",
"Version": "1.2",
"Design": {
"visitedTabs": [
"filter-type",
"specifications",
"components",
"tolerances",
"next-steps"
],
"filterType": "lowPass",
"specifications": {
"gain": 0,
"gainUnit": "dB",
"passbandAttenuation": -3,
"passbandFrequency": 20000,
"stopbandAttenuation": -40,
"stopbandFrequency": 40000,
"filterResponseValue": 0.02,
"filterResponseSlider": "44"
},
"components": {
"vsPlus": 12,
"vsMinus": -12,
"optimization": "RecommendedSpecificComponents",
"optimizationPreference": "specific",
"compensateForGbw": false,
"preferredAlgorithms": {
"sallenKey|lowPass": "lowpassV2"
},
"stages": [
{
"stageLetter": "A",
"componentSizing": 86,
"gain": -1,
"gainEnabled": false,
"implementation": "sallenKey",
"opAmps": "LT1012"
},
{
"stageLetter": "B",
"componentSizing": 90,
"gain": -1,
"gainEnabled": false,
"implementation": "sallenKey",
"opAmps": "LT1012"
},
{
"stageLetter": "C",
"componentSizing": 83,
"gain": -1,
"gainEnabled": false,
"implementation": "sallenKey",
"opAmps": "LT1012"
}
],
"recommendedAmps": [],
"sortOrder": [
0,
1,
2
]
},
"tolerances": {
"resistorTolerance": "5%",
"capacitorTolerance": "10%",
"inductorTolerance": "5%",
"opAmpGbwTolerance": "20%",
"resistorPreferredSeries": "E6",
"capacitorPreferredSeries": "E6",
"inductorPreferredSeries": "E12"
},
"nextSteps": {}
},
"CreatedDate": "2024-06-02 09:05:58 PM",
"UpdatedDate": "2024-06-02 09:05:58 PM"
}

3
main.c
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@ -3,6 +3,7 @@
#include <stdlib.h> #include <stdlib.h>
#include "scheduler.h" #include "scheduler.h"
#include "psg.h"
int main() { int main() {
WDTCTL = WDTPW | WDTHOLD; WDTCTL = WDTPW | WDTHOLD;
@ -18,6 +19,8 @@ int main() {
schInit(); schInit();
psgInit();
__enable_interrupt(); __enable_interrupt();

64
psg.c
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@ -23,9 +23,9 @@ const uint16_t frequencyCodes[8][12] = {
#define BUS_CTRL_REG P1OUT #define BUS_CTRL_REG P1OUT
#define BUS_CTRL_IN_REG P1IN #define BUS_CTRL_IN_REG P1IN
#define _CS0 BIT1 #define _CS0 BIT1
#define _CS1 BIT2 #define _WE BIT2
#define _WE BIT3 #define READY BIT3
#define READY BIT4 #define _CS1 BIT4
#define CHANNEL_A_PERIOD_ADDR 0 #define CHANNEL_A_PERIOD_ADDR 0
#define CHANNEL_A_ATTEN_ADDR 1 #define CHANNEL_A_ATTEN_ADDR 1
@ -36,8 +36,6 @@ const uint16_t frequencyCodes[8][12] = {
#define IGNORE_OCTET 0xff #define IGNORE_OCTET 0xff
uint8_t psgAmplitudeShadowValue[3];
static void delay() { static void delay() {
asm volatile ( asm volatile (
"push r12\n" "push r12\n"
@ -73,13 +71,13 @@ inline static void WRITE_CYCLE(uint8_t chipNo) {
delay(); delay();
} }
static void psgWrite(uint8_t chipNo, uint8_t value) { //static void psgWrite(uint8_t chipNo, uint8_t value) {
ADDR_DATA_REG = value; // ADDR_DATA_REG = value;
WRITE_CYCLE(chipNo); // WRITE_CYCLE(chipNo);
} //}
static void psgWriteFrequency(uint8_t channel, uint16_t frequencyCode) { static void psgWriteFrequency(uint8_t chip, uint8_t channel, uint16_t frequencyCode) {
uint8_t chipNo = channel / 3; uint8_t chipNo = chip;
uint8_t regAddr = (channel % 3) * 2; uint8_t regAddr = (channel % 3) * 2;
// bit order in frequncyCode and order in octet on data bus are reversed // bit order in frequncyCode and order in octet on data bus are reversed
@ -110,9 +108,8 @@ static void psgWriteFrequency(uint8_t channel, uint16_t frequencyCode) {
WRITE_CYCLE(chipNo); WRITE_CYCLE(chipNo);
} }
void psgAmplitude(uint8_t channel, uint8_t volume) { void psgAmplitude(uint8_t chip, uint8_t channel, uint8_t volume) {
psgAmplitudeShadowValue[channel] = volume; uint8_t chipNo = chip;
uint8_t chipNo = channel / 3;
uint8_t regAddr = ((channel % 3) * 2) + 1; uint8_t regAddr = ((channel % 3) * 2) + 1;
uint8_t attenuation = 15 - volume; uint8_t attenuation = 15 - volume;
@ -130,14 +127,12 @@ void psgAmplitude(uint8_t channel, uint8_t volume) {
WRITE_CYCLE(chipNo); WRITE_CYCLE(chipNo);
} }
void psgPlayTone(uint8_t channel, uint8_t volume, t_octave octave, t_note note) { void psgPlayTone(uint8_t chip, uint8_t channel, uint8_t volume, t_octave octave, t_note note) {
if (note == e_Pause) { if (note == e_Pause) {
psgAmplitude(channel, 0); psgAmplitude(chip, channel, 0);
} else { } else {
// if (psgAmplitudeShadowValue[channel] == 0) { psgAmplitude(chip, channel, volume);
psgAmplitude(channel, volume); psgWriteFrequency(chip, channel, frequencyCodes[octave][note]);
// }
psgWriteFrequency(channel, frequencyCodes[octave][note]);
} }
} }
@ -150,22 +145,25 @@ void psgInit() {
// bus control lines // bus control lines
// output: // output:
// BIT1: /CS chip 1 // BIT1: /CS chip 1
// BIT2: /CS chip 2 // BIT4: /CS chip 2
// BIT3: /WE // BIT2: /WE
// input: // input:
// BIT4: READY // BIT3: READY
P1DIR |= BIT1 | BIT2 | BIT3; P1DIR |= BIT1 | BIT2 | BIT4;
P1DIR &= ~BIT4; P1DIR &= ~BIT3;
// immediately disable all outputs, all are active low // immediately disable all outputs, all are active low
P1OUT |= BIT1 | BIT2 | BIT3; P1OUT |= BIT1 | BIT2 | BIT4;
// shutdown all channels including noise psgAmplitude(0, 0, 0);
psgWrite(0, 0b11111001); psgAmplitude(0, 1, 0);
psgWrite(0, 0b11111101); psgAmplitude(0, 2, 0);
psgWrite(0, 0b11111011); psgAmplitude(0, 3, 0); // noise
psgWrite(0, 0b11111111); psgAmplitude(1, 0, 0);
psgAmplitude(1, 1, 0);
psgAmplitude(1, 2, 0);
psgAmplitude(1, 3, 0); // noise
// psgPlayTone(0, 5, e_O_3, e_A); psgPlayTone(0, 0, 15, e_O_4, e_C);
psgAmplitude(0, 3); psgPlayTone(1, 0, 15, e_O_3, e_C);
} }