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main
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prepare_sp
Author | SHA1 | Date | |
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89cf210e92 | |||
7932b01c4c |
130
main.S
130
main.S
@ -9,12 +9,12 @@
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;; ----------------------------------------------------
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;; ----------------------------------------------------
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;; --- r4, r5 and r6 must not be used for any other ---
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;; --- r4, r5 and r6 must not be used for any other ---
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;; --- purpose ---
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;; --- purpose ---
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;; required for communication between drawscreen and isr
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;; required for communication between drawscreen and shifter isr
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#define SIGNAL_REGISTER r4
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#define SIGNAL_REGISTER r4
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#define SIGNAL_INIT_VALUE SIGNAL_OCTET_DONE
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#define SIGNAL_OCTET_DONE 0x01
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#define SIGNAL_OCTET_DONE 0x01
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#define SIGNAL_ISR_ENABLE 0x02
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#define SIGNAL_ISR_ENABLE 0x02
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#define SIGNAL_ALL_DATA_DONE 0x04
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#define SIGNAL_ALL_DATA_DONE 0x04
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#define SIGNAL_INIT_VALUE SIGNAL_OCTET_DONE
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;; required for handover of data between drawscreen and isr
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;; required for handover of data between drawscreen and isr
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#define DATA_REGISTER r5
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#define DATA_REGISTER r5
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@ -50,6 +50,12 @@
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.macro clear_debug
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.macro clear_debug
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bic #BIT2, &P1OUT
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bic #BIT2, &P1OUT
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.endm
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.endm
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.macro set_signal_waiting_for_data
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bis #BIT3, &P1OUT
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.endm
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.macro clear_signal_waiting_for_data
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bic #BIT3, &P1OUT
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.endm
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.section ".data"
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.section ".data"
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screendata:
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screendata:
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@ -87,12 +93,18 @@ init:
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;; BIT0: data bit
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;; BIT0: data bit
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;; BIT1: output enable
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;; BIT1: output enable
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;; BIT2: debug
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;; BIT2: debug
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mov.b #BIT0|BIT1|BIT2,&P1DIR
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;; BIT3: Signal waiting for data
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mov.b #BIT0|BIT1|BIT2|BIT3, &P1DIR
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mov.b #0,&P1OUT
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mov.b #0,&P1OUT
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;; BIT4: long pulse
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;; BIT5: spi, UCB0CLK
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;; BIT1: short pulse
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;; BIT6: spi, UCB0SOMI
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mov.b #BIT1|BIT4,&P2DIR
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;; BIT7: spi, UCB0SIMO
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mov.b #BIT1|BIT4,&P2SEL
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mov.b #BIT5|BIT6|BIT7, &P1SEL
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mov.b #BIT5|BIT6|BIT7, &P1SEL2
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;; BIT1: timer, short pulse
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;; BIT4: timer, long pulse
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mov.b #BIT1|BIT4, &P2DIR
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mov.b #BIT1|BIT4, &P2SEL
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;; timer configuration
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;; timer configuration
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;; configure and stop timer
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;; configure and stop timer
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@ -108,6 +120,11 @@ init:
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mov.w #OUTMOD_7,&TA1CCTL1
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mov.w #OUTMOD_7,&TA1CCTL1
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mov.w #OUTMOD_7,&TA1CCTL2
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mov.w #OUTMOD_7,&TA1CCTL2
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;; spi configuration
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;; USCI B to slave mode
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mov.b #0x00, &UCB0CTL0
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mov.b #0x00, &UCB0CTL1
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;; make sure the isr will not immediately start
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;; make sure the isr will not immediately start
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mov.b #SIGNAL_INIT_VALUE, SIGNAL_REGISTER
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mov.b #SIGNAL_INIT_VALUE, SIGNAL_REGISTER
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@ -119,15 +136,25 @@ init:
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;; ----------------------------------------------------
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;; ----------------------------------------------------
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mainloop:
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mainloop:
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call #forwardscreen_init
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;call #forwardscreen_init
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call #resetscreen
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call #resetscreen
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mainloop_draw:
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mainloop_draw:
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call #drawscreen
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call #drawscreen
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call #forwardscreen
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;; signal waiting for data
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set_signal_waiting_for_data
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call #forwardscreen
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call #wait
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call #wait
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;; receive data via spi
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;call #receivedata
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;; data has been received, clear signal
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clear_signal_waiting_for_data
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jmp mainloop_draw
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jmp mainloop_draw
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@ -136,7 +163,7 @@ wait:
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push r11
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push r11
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push r12
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push r12
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mov.w #0x0040, r11
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mov.w #0x0010, r11
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wait_continue_1:
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wait_continue_1:
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mov.w #0xffff, r12
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mov.w #0xffff, r12
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wait_continue_2:
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wait_continue_2:
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@ -164,7 +191,7 @@ forwardscreen:
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mov.w data_forward_pointer, r10
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mov.w data_forward_pointer, r10
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mov.b #_off, @r10
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mov.b #_off, @r10
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inc.w r10
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inc.w r10
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mov.b #_violet, @r10
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mov.b #_white, @r10
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cmp.w r10, r8
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cmp.w r10, r8
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jnz forwardscreen_done
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jnz forwardscreen_done
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mov.w #screendata, r10
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mov.w #screendata, r10
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@ -195,6 +222,67 @@ resetscreen_continue:
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ret
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ret
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;; ----------------------------------------------------
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receivedata:
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push r7
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push r8
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push r9
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push r10
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;; screendata addresses
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mov.w #screendata, r7
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mov.w #screendataend, r8
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;; wait for first octet
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receivedata_wait_for_first_octet:
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bit #UCB0RXIFG, &UC0IFG
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jz receivedata_wait_for_first_octet
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;; get data from buffer register
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mov.b UCB0RXBUF, r9
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;; check whether value == 0xff (wait for the whole
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;; set of data to fill the screendata)
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cmp.b #0xff, r9
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;; receive all data
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jz receivedata_wait_for_all_data
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;; if it is not 0xff, it is the octet number which is the
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;; relative address within screendata
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receivedata_wait_for_octet:
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bit #UCB0RXIFG, &UC0IFG
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jz receivedata_wait_for_octet
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;; get octet from buffer register
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mov.b UCB0RXBUF, r10
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;; move it to the destination
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mov.b r10, screendata(r9)
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;; done
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jmp receivedata_end
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receivedata_wait_for_all_data:
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;; this is a bit dangerous, if the application controller
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;; sends too few data, we are in a dead lock
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receivedata_end:
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pop r10
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pop r9
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pop r8
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pop r7
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ret
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;; ----------------------------------------------------
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;; ----------------------------------------------------
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drawscreen:
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drawscreen:
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push r7
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push r7
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@ -272,26 +360,26 @@ drawscreen_data_done:
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;; ----------------------------------------------------
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;; ----------------------------------------------------
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; --- timer isr ---
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; --- timer isr ---
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;; r6: exclusively used by isr as bit-counter
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;; r6: exclusively used by isr as bit-counter
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timer1_a0_isr:
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shifter_isr:
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;; check isr enable bit
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;; check isr enable bit
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bit #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
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bit #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
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jz timer1_a0_isr_exit
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jz shifter_isr_exit
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;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
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;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly
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rla.b DATA_REGISTER
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rla.b DATA_REGISTER
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jnc timer1_a0_isr_false_bit
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jnc shifter_isr_false_bit
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set_data_bit
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set_data_bit
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jmp timer1_a0_isr_end
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jmp shifter_isr_end
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timer1_a0_isr_false_bit:
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shifter_isr_false_bit:
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clear_data_bit
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clear_data_bit
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timer1_a0_isr_end:
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shifter_isr_end:
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;; enable output
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;; enable output
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set_output_enable
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set_output_enable
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;; roll bit-counter
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;; roll bit-counter
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rla.b BIT_COUNTER_REGISTER
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rla.b BIT_COUNTER_REGISTER
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jnc timer1_a0_isr_exit
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jnc shifter_isr_exit
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;; reset bit-counter
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;; reset bit-counter
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mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
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mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER
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@ -300,19 +388,19 @@ timer1_a0_isr_end:
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;; check whether all data are processed
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;; check whether all data are processed
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bit #SIGNAL_ALL_DATA_DONE, SIGNAL_REGISTER
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bit #SIGNAL_ALL_DATA_DONE, SIGNAL_REGISTER
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jz timer1_a0_isr_exit
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jz shifter_isr_exit
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;; disable isr
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;; disable isr
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bic #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
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bic #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER
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;; disable output
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;; disable output
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clear_output_enable
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clear_output_enable
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timer1_a0_isr_exit:
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shifter_isr_exit:
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reti
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reti
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;; ----------------------------------------------------
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;; ----------------------------------------------------
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.section "__interrupt_vector_14","ax",@progbits
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.section "__interrupt_vector_14","ax",@progbits
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.word timer1_a0_isr
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.word shifter_isr
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;; .resetvec comes from linker
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;; .resetvec comes from linker
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.section ".resetvec","ax",@progbits
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.section ".resetvec","ax",@progbits
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