diff --git a/main.S b/main.S index 2e951b9..2a9196a 100644 --- a/main.S +++ b/main.S @@ -9,12 +9,12 @@ ;; ---------------------------------------------------- ;; --- r4, r5 and r6 must not be used for any other --- ;; --- purpose --- -;; required for communication between drawscreen and isr +;; required for communication between drawscreen and shifter isr #define SIGNAL_REGISTER r4 +#define SIGNAL_INIT_VALUE SIGNAL_OCTET_DONE #define SIGNAL_OCTET_DONE 0x01 #define SIGNAL_ISR_ENABLE 0x02 #define SIGNAL_ALL_DATA_DONE 0x04 -#define SIGNAL_INIT_VALUE SIGNAL_OCTET_DONE ;; required for handover of data between drawscreen and isr #define DATA_REGISTER r5 @@ -50,6 +50,12 @@ .macro clear_debug bic #BIT2, &P1OUT .endm + .macro set_signal_waiting_for_data + bis #BIT3, &P1OUT + .endm + .macro clear_signal_waiting_for_data + bic #BIT3, &P1OUT + .endm .section ".data" screendata: @@ -87,12 +93,17 @@ init: ;; BIT0: data bit ;; BIT1: output enable ;; BIT2: debug - mov.b #BIT0|BIT1|BIT2,&P1DIR + ;; BIT3: Signal waiting for data + ;; BIT6: UCB0SOMI - not used + mov.b #BIT0|BIT1|BIT2|BIT3|BIT6,&P1DIR mov.b #0,&P1OUT - ;; BIT4: long pulse - ;; BIT1: short pulse - mov.b #BIT1|BIT4,&P2DIR - mov.b #BIT1|BIT4,&P2SEL + ;; BIT1: timer, short pulse + ;; BIT4: timer, long pulse + ;; BIT5: spi, UCB0CLK + ;; BIT6: spi, UCB0SOMI + ;; BIT7: spi, UCB0SIMO + mov.b #BIT1|BIT4|BIT5|BIT6|BIT7,&P2DIR + mov.b #BIT1|BIT4|BIT5|BIT6|BIT7,&P2SEL ;; timer configuration ;; configure and stop timer @@ -108,6 +119,11 @@ init: mov.w #OUTMOD_7,&TA1CCTL1 mov.w #OUTMOD_7,&TA1CCTL2 + ;; spi configuration + ;; USCI B to slave mode + mov.b #0x00, &UCB0CTL0 + mov.b #0x00, &UCB0CTL1 + ;; make sure the isr will not immediately start mov.b #SIGNAL_INIT_VALUE, SIGNAL_REGISTER @@ -119,14 +135,24 @@ init: ;; ---------------------------------------------------- mainloop: - call #forwardscreen_init + ;call #forwardscreen_init call #resetscreen mainloop_draw: call #drawscreen - call #forwardscreen + ;call #forwardscreen + + ;call #wait + + ;; signal waiting for data + set_signal_waiting_for_data + + ;; receive data via spi + call #receivedata + + ;; data has been received, clear signal + clear_signal_waiting_for_data - call #wait jmp mainloop_draw @@ -136,7 +162,7 @@ wait: push r11 push r12 - mov.w #0x0040, r11 + mov.w #0x0010, r11 wait_continue_1: mov.w #0xffff, r12 wait_continue_2: @@ -164,7 +190,7 @@ forwardscreen: mov.w data_forward_pointer, r10 mov.b #_off, @r10 inc.w r10 - mov.b #_violet, @r10 + mov.b #_white, @r10 cmp.w r10, r8 jnz forwardscreen_done mov.w #screendata, r10 @@ -195,6 +221,67 @@ resetscreen_continue: ret +;; ---------------------------------------------------- +receivedata: + push r7 + push r8 + push r9 + push r10 + + ;; screendata addresses + mov.w #screendata, r7 + mov.w #screendataend, r8 + + ;; wait for first octet +receivedata_wait_for_first_octet: + bit #UCB0RXIFG, &UC0IFG + jz receivedata_wait_for_first_octet + + ;; get data from buffer register + mov.b UCB0RXBUF, r9 + + ;; check whether value == 0xff (wait for the whole + ;; set of data to fill the screendata) + cmp.b #0xff, r9 + + ;; receive all data + jz receivedata_wait_for_all_data + + ;; if it is not 0xff, it is the octet number which is the + ;; relative address within screendata +receivedata_wait_for_octet: + bit #UCB0RXIFG, &UC0IFG + jz receivedata_wait_for_octet + + ;; get octet from buffer register + mov.b UCB0RXBUF, r10 + + ;; move it to the destination + mov.b r10, screendata(r9) + + ;; done + jmp receivedata_end + +receivedata_wait_for_all_data: + ;; this is a bit dangerous, if the application controller + ;; sends too few data, we are in a dead lock + + + + + +receivedata_end: + pop r10 + pop r9 + pop r8 + pop r7 + ret + + + + + + ;; ---------------------------------------------------- drawscreen: push r7 @@ -272,26 +359,26 @@ drawscreen_data_done: ;; ---------------------------------------------------- ; --- timer isr --- ;; r6: exclusively used by isr as bit-counter -timer1_a0_isr: +shifter_isr: ;; check isr enable bit bit #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER - jz timer1_a0_isr_exit + jz shifter_isr_exit ;; shift msb of data register r5 into carry flag and set or reset P1.0 accordingly rla.b DATA_REGISTER - jnc timer1_a0_isr_false_bit + jnc shifter_isr_false_bit set_data_bit - jmp timer1_a0_isr_end -timer1_a0_isr_false_bit: + jmp shifter_isr_end +shifter_isr_false_bit: clear_data_bit -timer1_a0_isr_end: +shifter_isr_end: ;; enable output set_output_enable ;; roll bit-counter rla.b BIT_COUNTER_REGISTER - jnc timer1_a0_isr_exit + jnc shifter_isr_exit ;; reset bit-counter mov.b #BIT_COUNTER_INIT_VALUE, BIT_COUNTER_REGISTER @@ -300,19 +387,19 @@ timer1_a0_isr_end: ;; check whether all data are processed bit #SIGNAL_ALL_DATA_DONE, SIGNAL_REGISTER - jz timer1_a0_isr_exit + jz shifter_isr_exit ;; disable isr bic #SIGNAL_ISR_ENABLE, SIGNAL_REGISTER ;; disable output clear_output_enable -timer1_a0_isr_exit: +shifter_isr_exit: reti ;; ---------------------------------------------------- .section "__interrupt_vector_14","ax",@progbits - .word timer1_a0_isr + .word shifter_isr ;; .resetvec comes from linker .section ".resetvec","ax",@progbits