10 Commits

Author SHA1 Message Date
adf6d9c3ee Update w5300.h
fix some bug
2015-09-15 15:03:13 +09:00
241045068d Merge branch 'hotfix/v2.0.3' 2015-08-28 13:55:55 +09:00
0cabf536fd Fixed an issue #9. 2015-08-28 13:54:59 +09:00
d9e2bd1d65 Merge pull request #8 from fetzerch/wizchip_conf
wizchip_conf: Enable configuration without modifying file
2015-08-13 14:45:36 +09:00
fb3fdf47cc wizchip_conf: Enable configuration without modifying file
This encloses all user configuration options with preprocessor
ifndef ... endif guards, so that the configuration can be applied
already from the Makefile (for example with gcc -D_WIZCHIP_=5100 or
when using CMake: add_definitions(-D_WIZCHIP_=5100)).

The advantage of this change is that the ioLibrary can then simply be
included as a git submodule from the official upstream repository into
the own project without having to carry along a patch of
wizchip_conf.h.
2015-07-24 10:24:47 +02:00
942164d421 V3.0.1
Bug fixed : In W5100, CS control problem to read/write buffer with SPI.
2015-07-15 16:22:02 +09:00
1e940bbf14 Version V3.0
Add to W5300
2015-06-04 20:41:00 +09:00
bd4a3a8d55 Merge branch 'hotfix/v2.0.2' 2015-04-24 13:54:12 +09:00
989f08ab2d Removed unnessary code. 2015-04-24 13:52:22 +09:00
cd0b8f5ba9 getSIMR() & getSIMR() in w5200.h
In w5200.h,
Remove  the Mask value 0xA0 in getSIMR() & setSIMR()
Add to the Mask value 0xA0 in getIR() & setIR()
2015-04-17 13:33:42 +09:00
17 changed files with 3183 additions and 226 deletions

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Ethernet/Socket_APIs.chm Normal file

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@ -1,7 +1,7 @@
//***************************************************************************** //*****************************************************************************
// //
//! \file w5200.c //! \file w5100.c
//! \brief W5200 HAL Interface. //! \brief W5100 HAL Interface.
//! \version 1.0.0 //! \version 1.0.0
//! \date 2013/10/21 //! \date 2013/10/21
//! \par Revision history //! \par Revision history
@ -44,7 +44,7 @@
/** /**
@brief This function writes the data into W5200 registers. @brief This function writes the data into W5200 registers.
*/ */
void WIZCHIP_WRITE(uint16_t AddrSel, uint8_t wb ) void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb )
{ {
WIZCHIP_CRITICAL_ENTER(); WIZCHIP_CRITICAL_ENTER();
WIZCHIP.CS._select(); WIZCHIP.CS._select();
@ -55,13 +55,19 @@ void WIZCHIP_WRITE(uint16_t AddrSel, uint8_t wb )
WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF) >> 0); WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF) >> 0);
WIZCHIP.IF.SPI._write_byte(wb); // Data write (write 1byte data) WIZCHIP.IF.SPI._write_byte(wb); // Data write (write 1byte data)
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
WIZCHIP.IF.BUS._write_byte(AddrSel,wb); //M20150601 : Rename the function for integrating with ioLibrary
//WIZCHIP.IF.BUS._write_byte(AddrSel,wb);
WIZCHIP.IF.BUS._write_data(AddrSel,wb);
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
//add indirect bus //add indirect bus
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8); //M20150601 : Rename the function for integrating with ioLibrary
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF)); //WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_DR,wb); //WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF));
//WIZCHIP.IF.BUS._write_byte(IDM_DR,wb);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x00FF));
WIZCHIP.IF.BUS._write_data(IDM_DR,wb);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!"
#endif #endif
@ -72,7 +78,7 @@ void WIZCHIP_WRITE(uint16_t AddrSel, uint8_t wb )
/** /**
@brief This function reads the value from W5200 registers. @brief This function reads the value from W5200 registers.
*/ */
uint8_t WIZCHIP_READ(uint16_t AddrSel) uint8_t WIZCHIP_READ(uint32_t AddrSel)
{ {
uint8_t ret; uint8_t ret;
@ -85,13 +91,20 @@ uint8_t WIZCHIP_READ(uint16_t AddrSel)
WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF) >> 0); WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF) >> 0);
ret = WIZCHIP.IF.SPI._read_byte(); ret = WIZCHIP.IF.SPI._read_byte();
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
ret = WIZCHIP.IF.BUS._read_byte(AddrSel); //M20150601 : Rename the function for integrating with ioLibrary
//ret = WIZCHIP.IF.BUS._read_byte(AddrSel);
ret = WIZCHIP.IF.BUS._read_data(AddrSel);
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
//add indirect bus //add indirect bus
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8); //M20150601 : Rename the function for integrating with ioLibrary
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF)); //WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8);
ret = WIZCHIP.IF.BUS._read_byte(IDM_DR); //WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF));
//ret = WIZCHIP.IF.BUS._read_byte(IDM_DR);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x00FF));
ret = WIZCHIP.IF.BUS._read_data(IDM_DR);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!"
#endif #endif
@ -105,36 +118,53 @@ uint8_t WIZCHIP_READ(uint16_t AddrSel)
/** /**
@brief This function writes into W5200 memory(Buffer) @brief This function writes into W5200 memory(Buffer)
*/ */
void WIZCHIP_WRITE_BUF(uint16_t AddrSel, uint8_t* pBuf, uint16_t len) void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
{ {
uint16_t i = 0; uint16_t i = 0;
WIZCHIP_CRITICAL_ENTER(); WIZCHIP_CRITICAL_ENTER();
WIZCHIP.CS._select(); //M20150601 : Moved here.
#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)) #if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
for(i = 0; i < len; i++) for(i = 0; i < len; i++)
{ {
//M20160715 : Depricated "M20150601 : Remove _select() to top-side"
// CS should be controlled every SPI frames
WIZCHIP.CS._select(); WIZCHIP.CS._select();
WIZCHIP.IF.SPI._write_byte(0xF0); WIZCHIP.IF.SPI._write_byte(0xF0);
WIZCHIP.IF.SPI._write_byte((((uint16_t)(AddrSel+i)) & 0xFF00) >> 8); WIZCHIP.IF.SPI._write_byte((((uint16_t)(AddrSel+i)) & 0xFF00) >> 8);
WIZCHIP.IF.SPI._write_byte((((uint16_t)(AddrSel+i)) & 0x00FF) >> 0); WIZCHIP.IF.SPI._write_byte((((uint16_t)(AddrSel+i)) & 0x00FF) >> 0);
WIZCHIP.IF.SPI._write_byte(pBuf[i]); // Data write (write 1byte data) WIZCHIP.IF.SPI._write_byte(pBuf[i]); // Data write (write 1byte data)
//M20160715 : Depricated "M20150601 : Remove _select() to top-side"
WIZCHIP.CS._deselect(); WIZCHIP.CS._deselect();
} }
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
for(i = 0; i < len; i++) for(i = 0; i < len; i++)
WIZCHIP.IF.BUS._write_byte(AddrSel+i,pBuf[i]); //M20150601 : Rename the function for integrating with ioLibrary
// WIZCHIP.IF.BUS._write_byte(AddrSel+i,pBuf[i]);
WIZCHIP.IF.BUS._write_data(AddrSel+i,pBuf[i]);
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
//M20150601 : Rename the function for integrating with ioLibrary
/*
WIZCHIP_WRITE(MR,WIZCHIP_READ(MR) | MR_AI); WIZCHIP_WRITE(MR,WIZCHIP_READ(MR) | MR_AI);
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8); WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF)); WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF));
for(i = 0 ; i < len; i++) for(i = 0 ; i < len; i++)
WIZCHIP.IF.BUS._write_byte(IDM_DR,pBuf[i]); WIZCHIP.IF.BUS._write_byte(IDM_DR,pBuf[i]);
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI);
*/
setMR(getMR()|MR_AI);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x00FF));
for(i = 0 ; i < len; i++)
WIZCHIP.IF.BUS._write_data(IDM_DR,pBuf[i]);
setMR(getMR() & ~MR_AI);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!!"
#endif #endif
WIZCHIP.CS._deselect(); //M20150601 : Moved here.
WIZCHIP_CRITICAL_EXIT(); WIZCHIP_CRITICAL_EXIT();
} }
@ -142,35 +172,52 @@ void WIZCHIP_WRITE_BUF(uint16_t AddrSel, uint8_t* pBuf, uint16_t len)
@brief This function reads into W5200 memory(Buffer) @brief This function reads into W5200 memory(Buffer)
*/ */
void WIZCHIP_READ_BUF (uint16_t AddrSel, uint8_t* pBuf, uint16_t len) void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
{ {
uint16_t i = 0; uint16_t i = 0;
WIZCHIP_CRITICAL_ENTER(); WIZCHIP_CRITICAL_ENTER();
WIZCHIP.CS._select(); //M20150601 : Moved here.
#if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)) #if( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_))
for(i = 0; i < len; i++) for(i = 0; i < len; i++)
{ {
//M20160715 : Depricated "M20150601 : Remove _select() to top-side"
// CS should be controlled every SPI frames
WIZCHIP.CS._select(); WIZCHIP.CS._select();
WIZCHIP.IF.SPI._write_byte(0x0F); WIZCHIP.IF.SPI._write_byte(0x0F);
WIZCHIP.IF.SPI._write_byte((uint16_t)((AddrSel+i) & 0xFF00) >> 8); WIZCHIP.IF.SPI._write_byte((uint16_t)((AddrSel+i) & 0xFF00) >> 8);
WIZCHIP.IF.SPI._write_byte((uint16_t)((AddrSel+i) & 0x00FF) >> 0); WIZCHIP.IF.SPI._write_byte((uint16_t)((AddrSel+i) & 0x00FF) >> 0);
pBuf[i] = WIZCHIP.IF.SPI._read_byte(); pBuf[i] = WIZCHIP.IF.SPI._read_byte();
//M20160715 : Depricated "M20150601 : Remove _select() to top-side"
WIZCHIP.CS._deselect(); WIZCHIP.CS._deselect();
} }
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
for(i = 0 ; i < len; i++) for(i = 0 ; i < len; i++)
pBuf[i] = WIZCHIP.IF.BUS._read_byte(AddrSel+i); //M20150601 : Rename the function for integrating with ioLibrary
// pBuf[i] = WIZCHIP.IF.BUS._read_byte(AddrSel+i);
pBuf[i] = WIZCHIP.IF.BUS._read_data(AddrSel+i);
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) ) #elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
//M20150601 : Rename the function for integrating with ioLibrary
/*
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) | MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) | MR_AI);
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8); WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF)); WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x00FF));
for(i = 0 ; i < len; i++) for(i = 0 ; i < len; i++)
pBuf[i] = WIZCHIP.IF.BUS._read_byte(IDM_DR); pBuf[i] = WIZCHIP.IF.BUS._read_byte(IDM_DR);
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI);
*/
setMR(getMR() | MR_AI);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0xFF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x00FF));
for(i = 0 ; i < len; i++)
pBuf[i] = WIZCHIP.IF.BUS._read_data(IDM_DR);
setMR(getMR() & ~MR_AI);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5100. !!!!"
#endif #endif
WIZCHIP.CS._deselect(); //M20150601 : Moved Here.
WIZCHIP_CRITICAL_EXIT(); WIZCHIP_CRITICAL_EXIT();
} }

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@ -43,7 +43,9 @@
#include <stdint.h> #include <stdint.h>
#include "wizchip_conf.h" #include "wizchip_conf.h"
/// \cond DOXY_APPLY_CODE
#if (_WIZCHIP_ == 5100) #if (_WIZCHIP_ == 5100)
/// \endcond
#define _WIZCHIP_SN_BASE_ (0x0400) #define _WIZCHIP_SN_BASE_ (0x0400)
#define _WIZCHIP_SN_SIZE_ (0x0100) #define _WIZCHIP_SN_SIZE_ (0x0100)
@ -196,7 +198,11 @@
* - \ref MR_AI : Address Auto-Increment in Indirect Bus Interface * - \ref MR_AI : Address Auto-Increment in Indirect Bus Interface
* - \ref MR_IND : Indirect Bus Interface mode * - \ref MR_IND : Indirect Bus Interface mode
*/ */
#define MR (_W5100_IO_BASE_ + (0x0000)) // Mode #if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
#define MR (_WIZCHIP_IO_BASE_ + (0x0000)) // Mode
#else
#define MR (_W5100_IO_BASE_ + (0x0000)) // Mode
#endif
/** /**
* @ingroup Common_register_group_W5100 * @ingroup Common_register_group_W5100
@ -271,7 +277,7 @@
* @ingroup Common_register_group_W5100 * @ingroup Common_register_group_W5100
* @brief Retry count register(R/W) * @brief Retry count register(R/W)
* @details \ref _RCR_ configures the number of time of retransmission. * @details \ref _RCR_ configures the number of time of retransmission.
* When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (\ref Sn_IR[TIMEOUT] = '1'). * When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (\ref Sn_IR_TIMEOUT = '1').
*/ */
#define _RCR_ (_W5100_IO_BASE_ + (0x0019)) // Retry Count #define _RCR_ (_W5100_IO_BASE_ + (0x0019)) // Retry Count
#define RMSR (_W5100_IO_BASE_ + (0x001A)) // Receicve Memory Size #define RMSR (_W5100_IO_BASE_ + (0x001A)) // Receicve Memory Size
@ -421,7 +427,7 @@
* @ingroup Socket_register_group_W5100 * @ingroup Socket_register_group_W5100
* @brief source port register(R/W) * @brief source port register(R/W)
* @details \ref Sn_PORT configures the source port number of Socket n. * @details \ref Sn_PORT configures the source port number of Socket n.
* It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered. * It is valid when Socket n is used in TCP/UDP mode. It should be set before OPEN command is ordered.
*/ */
#define Sn_PORT(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) // source port register #define Sn_PORT(sn) (_W5100_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) // source port register
@ -956,7 +962,7 @@
* @brief Closing state * @brief Closing state
* @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n * @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n
* This is half-closing status, and data can be transferred.\n * This is half-closing status, and data can be transferred.\n
* For full-closing, DISCON command is used. But For just-closing, CLOSE command is used. * For full-closing, DISCON command is used. But For just-closing, @ref Sn_CR_CLOSE command is used.
*/ */
#define SOCK_CLOSE_WAIT 0x1C #define SOCK_CLOSE_WAIT 0x1C
@ -970,23 +976,23 @@
/** /**
* @brief UDP socket * @brief UDP socket
* @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010).\n * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010).\n
* It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n * It changes to SOCK_UDP when Sn_MR(P[3:0]) = 010 and @ref Sn_CR_OPEN command is ordered.\n
* Unlike TCP mode, data can be transfered without the connection-process. * Unlike TCP mode, data can be transfered without the connection-process.
*/ */
#define SOCK_UDP 0x22 ///< udp socket #define SOCK_UDP 0x22 ///< udp socket
/** /**
* @brief IP raw mode socket * @brief IP raw mode socket
* @details TThe socket is opened in IPRAW mode. The SOCKET status is change to SOCK_IPRAW when Sn_MR (P3:P0) is * @details TThe socket is opened in IPRAW mode. The SOCKET status is change to SOCK_IPRAW when @ref Sn_MR (P3:P0) is
* Sn_MR_IPRAW and OPEN command is used.\n * Sn_MR_IPRAW and @ref Sn_CR_OPEN command is used.\n
* IP Packet can be transferred without a connection similar to the UDP mode. * IP Packet can be transferred without a connection similar to the UDP mode.
*/ */
#define SOCK_IPRAW 0x32 ///< ip raw mode socket #define SOCK_IPRAW 0x32 ///< ip raw mode socket
/** /**
* @brief MAC raw mode socket * @brief MAC raw mode socket
* @details This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.\n * @details This indicates Socket 0 is opened in MACRAW mode (@ref Sn_MR(P[3:0]) = '100' and n=0) and is valid only in Socket 0.\n
* It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100)and OPEN command is ordered.\n * It changes to SOCK_MACRAW when @ref Sn_MR(P[3:0]) = '100' and @ref Sn_CR_OPEN command is ordered.\n
* Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process. * Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process.
*/ */
#define SOCK_MACRAW 0x42 ///< mac raw mode socket #define SOCK_MACRAW 0x42 ///< mac raw mode socket
@ -1047,13 +1053,16 @@ connection.
//////////////////////// ////////////////////////
// Basic I/O Function // // Basic I/O Function //
//////////////////////// ////////////////////////
//
//M20150601 : uint16_t AddrSel --> uint32_t AddrSel
//
/** /**
* @ingroup Basic_IO_function_W5100 * @ingroup Basic_IO_function_W5100
* @brief It reads 1 byte value from a register. * @brief It reads 1 byte value from a register.
* @param AddrSel Register address * @param AddrSel Register address
* @return The value of register * @return The value of register
*/ */
uint8_t WIZCHIP_READ (uint16_t AddrSel); uint8_t WIZCHIP_READ (uint32_t AddrSel);
/** /**
* @ingroup Basic_IO_function_W5100 * @ingroup Basic_IO_function_W5100
@ -1062,7 +1071,7 @@ uint8_t WIZCHIP_READ (uint16_t AddrSel);
* @param wb Write data * @param wb Write data
* @return void * @return void
*/ */
void WIZCHIP_WRITE(uint16_t AddrSel, uint8_t wb ); void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb );
/** /**
* @ingroup Basic_IO_function_W5100 * @ingroup Basic_IO_function_W5100
@ -1071,7 +1080,7 @@ void WIZCHIP_WRITE(uint16_t AddrSel, uint8_t wb );
* @param pBuf Pointer buffer to read data * @param pBuf Pointer buffer to read data
* @param len Data length * @param len Data length
*/ */
void WIZCHIP_READ_BUF (uint16_t AddrSel, uint8_t* pBuf, uint16_t len); void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
/** /**
* @ingroup Basic_IO_function_W5100 * @ingroup Basic_IO_function_W5100
@ -1080,7 +1089,7 @@ void WIZCHIP_READ_BUF (uint16_t AddrSel, uint8_t* pBuf, uint16_t len);
* @param pBuf Pointer buffer to write data * @param pBuf Pointer buffer to write data
* @param len Data length * @param len Data length
*/ */
void WIZCHIP_WRITE_BUF(uint16_t AddrSel, uint8_t* pBuf, uint16_t len); void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
///////////////////////////////// /////////////////////////////////
@ -1723,7 +1732,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
* @brief Set @ref Sn_FRAG register * @brief Set @ref Sn_FRAG register
* @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param (uint16_t)frag Value to set \ref Sn_FRAG * @param (uint16_t)frag Value to set \ref Sn_FRAG
* @sa getSn_FRAD() * @sa getSn_FRAG()
*/ */
#define setSn_FRAG(sn, frag) { \ #define setSn_FRAG(sn, frag) { \
WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \ WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \
@ -1805,7 +1814,6 @@ uint32_t getSn_TxBASE(uint8_t sn);
* and updates the Tx write pointer register. * and updates the Tx write pointer register.
* This function is being called by send() and sendto() function also. * This function is being called by send() and sendto() function also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param wizdata Pointer buffer to write data * @param wizdata Pointer buffer to write data
* @param len Data length * @param len Data length
@ -1822,7 +1830,6 @@ void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
* to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes. * to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
* This function is being called by recv() also. * This function is being called by recv() also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param wizdata Pointer buffer to read data * @param wizdata Pointer buffer to read data
* @param len Data length * @param len Data length
@ -1839,7 +1846,9 @@ void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
*/ */
void wiz_recv_ignore(uint8_t sn, uint16_t len); void wiz_recv_ignore(uint8_t sn, uint16_t len);
/// @cond DOXY_APPLY_CODE
#endif #endif
/// @endcond
#endif //_W5100_H_ #endif //_W5100_H_

View File

@ -59,9 +59,14 @@ void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb )
#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) ) #elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
//add indirect bus //add indirect bus
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8); //M20150601 : Rename the function for integrating with W5300
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF)); //WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_DR,wb); //WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF));
//WIZCHIP.IF.BUS._write_byte(IDM_DR,wb);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x000000FF));
WIZCHIP.IF.BUS._write_data(IDM_DR,wb);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!"
#endif #endif
@ -89,9 +94,13 @@ uint8_t WIZCHIP_READ(uint32_t AddrSel)
#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) ) #elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
//add indirect bus //add indirect bus
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8); //M20150601 : Rename the function for integrating with W5300
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF)); //WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
ret = WIZCHIP.IF.BUS._read_byte(IDM_DR); //WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF));
//ret = WIZCHIP.IF.BUS._read_byte(IDM_DR);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x000000FF));
ret = WIZCHIP.IF.BUS._read_data(IDM_DR);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!"
@ -121,12 +130,21 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
WIZCHIP.IF.SPI._write_byte(pBuf[i]); WIZCHIP.IF.SPI._write_byte(pBuf[i]);
#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) ) #elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
//M20150601 : Rename the function for integrating with W5300
/*
WIZCHIP_WRITE(MR,WIZCHIP_READ(MR) | MR_AI); WIZCHIP_WRITE(MR,WIZCHIP_READ(MR) | MR_AI);
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8); WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF)); WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF));
for(i = 0 ; i < len; i++) for(i = 0 ; i < len; i++)
WIZCHIP.IF.BUS._write_byte(IDM_DR,pBuf[i]); WIZCHIP.IF.BUS._write_byte(IDM_DR,pBuf[i]);
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI);
*/
setMR(getMR() | MR_AI);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x000000FF));
for(i = 0 ; i < len; i++)
WIZCHIP.IF.BUS._write_data(IDM_DR,pBuf[i]);
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!!"
#endif #endif
@ -138,7 +156,6 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
/** /**
@brief This function reads into W5200 memory(Buffer) @brief This function reads into W5200 memory(Buffer)
*/ */
void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len) void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
{ {
uint16_t i = 0; uint16_t i = 0;
@ -154,12 +171,21 @@ void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
pBuf[i] = WIZCHIP.IF.SPI._read_byte(); pBuf[i] = WIZCHIP.IF.SPI._read_byte();
#elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) ) #elif ( (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_) )
//M20150601 : Rename the function for integrating with W5300
/*
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) | MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) | MR_AI);
WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8); WIZCHIP.IF.BUS._write_byte(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF)); WIZCHIP.IF.BUS._write_byte(IDM_AR1,(AddrSel & 0x000000FF));
for(i = 0 ; i < len; i++) for(i = 0 ; i < len; i++)
pBuf[i] = WIZCHIP.IF.BUS._read_byte(IDM_DR); pBuf[i] = WIZCHIP.IF.BUS._read_byte(IDM_DR);
WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI); WIZCHIP_WRITE(MR, WIZCHIP_READ(MR) & ~MR_AI);
*/
setMR(getMR() | MR_AI);
WIZCHIP.IF.BUS._write_data(IDM_AR0,(AddrSel & 0x0000FF00) >> 8);
WIZCHIP.IF.BUS._write_data(IDM_AR1,(AddrSel & 0x000000FF));
for(i = 0 ; i < len; i++)
pBuf[i] = WIZCHIP.IF.BUS._read_data(IDM_DR);
setMR(getMR() & ~MR_AI);
#else #else
#error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!!" #error "Unknown _WIZCHIP_IO_MODE_ in W5200. !!!!"
#endif #endif

View File

@ -43,7 +43,9 @@
#include <stdint.h> #include <stdint.h>
#include "wizchip_conf.h" #include "wizchip_conf.h"
/// \cond DOXY_APPLY_CODE
#if (_WIZCHIP_ == 5200) #if (_WIZCHIP_ == 5200)
/// \endcond
#define _WIZCHIP_SN_BASE_ (0x4000) #define _WIZCHIP_SN_BASE_ (0x4000)
#define _WIZCHIP_SN_SIZE_ (0x0100) #define _WIZCHIP_SN_SIZE_ (0x0100)
@ -199,7 +201,11 @@
* - \ref MR_AI : Address Auto-Increment in Indirect Bus Interface * - \ref MR_AI : Address Auto-Increment in Indirect Bus Interface
* - \ref MR_IND : Indirect Bus Interface mode * - \ref MR_IND : Indirect Bus Interface mode
*/ */
#define MR (_W5200_IO_BASE_ + (0x0000)) // Mode #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_)
#define MR (_WIZCHIP_IO_BASE_ + (0x0000)) // Mode
#else
#define MR (_W5200_IO_BASE_ + (0x0000)) // Mode
#endif
/** /**
* @ingroup Common_register_group_W5200 * @ingroup Common_register_group_W5200
@ -261,7 +267,7 @@
/** /**
* @ingroup Common_register_group_W5200 * @ingroup Common_register_group_W5200
* @brief Timeout register address( 1 is 100us )(R/W) * @brief Timeout register address( 1 is 100us )(R/W)
* @details \ref _RTR_ configures the retransmission timeout period. The unit of timeout period is 100us and the default of \ref _RTR_ is x07D0or 000 * @details \ref _RTR_ configures the retransmission timeout period. The unit of timeout period is 100us and the default of \ref _RTR_ is x07D0.
* And so the default timeout period is 200ms(100us X 2000). During the time configured by \ref _RTR_, W5200 waits for the peer response * And so the default timeout period is 200ms(100us X 2000). During the time configured by \ref _RTR_, W5200 waits for the peer response
* to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command). * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command).
* If the peer does not respond within the \ref _RTR_ time, W5200 retransmits the packet or issues timeout. * If the peer does not respond within the \ref _RTR_ time, W5200 retransmits the packet or issues timeout.
@ -272,7 +278,7 @@
* @ingroup Common_register_group_W5200 * @ingroup Common_register_group_W5200
* @brief Retry count register(R/W) * @brief Retry count register(R/W)
* @details \ref _RCR_ configures the number of time of retransmission. * @details \ref _RCR_ configures the number of time of retransmission.
* When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (\ref Sn_IR[TIMEOUT] = '1'). * When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (\ref Sn_IR_TIMEOUT = '1').
*/ */
#define _RCR_ (_W5200_IO_BASE_ + (0x0019)) // Retry Count #define _RCR_ (_W5200_IO_BASE_ + (0x0019)) // Retry Count
@ -498,7 +504,7 @@
* @ingroup Socket_register_group_W5200 * @ingroup Socket_register_group_W5200
* @brief source port register(R/W) * @brief source port register(R/W)
* @details \ref Sn_PORT configures the source port number of Socket n. * @details \ref Sn_PORT configures the source port number of Socket n.
* It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered. * It is valid when Socket n is used in TCP/UDP mode. It should be set before OPEN command is ordered.
*/ */
#define Sn_PORT(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) // source port register #define Sn_PORT(sn) (_W5200_IO_BASE_ + WIZCHIP_SREG_BLOCK(sn) + (0x0004)) // source port register
@ -1103,7 +1109,7 @@
/** /**
* @brief UDP socket * @brief UDP socket
* @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010).\n * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010).\n
* It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n * It changes to SOCK_UDP when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n
* Unlike TCP mode, data can be transfered without the connection-process. * Unlike TCP mode, data can be transfered without the connection-process.
*/ */
#define SOCK_UDP 0x22 ///< udp socket #define SOCK_UDP 0x22 ///< udp socket
@ -1226,8 +1232,11 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
* @param (uint8_t)mr The value to be set. * @param (uint8_t)mr The value to be set.
* @sa getMR() * @sa getMR()
*/ */
#define setMR(mr) \ #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)
WIZCHIP_WRITE(MR,mr) #define setMR(mr) WIZCHIP_WRITE(MR,mr)
#else
#define setMR(mr) (*((uint8_t*)MR) = mr)
#endif
/** /**
* @ingroup Common_register_access_function_W5200 * @ingroup Common_register_access_function_W5200
@ -1235,8 +1244,11 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
* @return uint8_t. The value of Mode register. * @return uint8_t. The value of Mode register.
* @sa setMR() * @sa setMR()
*/ */
#define getMR() \ #if (_WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_SPI_)
WIZCHIP_READ(MR) #define getMR() WIZCHIP_READ(MR)
#else
#define getMR() (*(uint8_t*)MR)
#endif
/** /**
* @ingroup Common_register_access_function_W5200 * @ingroup Common_register_access_function_W5200
@ -1342,7 +1354,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
WIZCHIP_WRITE(_IMR_, imr) WIZCHIP_WRITE(_IMR_, imr)
*/ */
#define setIMR(imr) \ #define setIMR(imr) \
WIZCHIP_WRITE(IMR2, imr) WIZCHIP_WRITE(IMR2, imr & 0xA0)
/** /**
* @ingroup Common_register_access_function_W5200 * @ingroup Common_register_access_function_W5200
@ -1356,7 +1368,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
WIZCHIP_READ(_IMR_) WIZCHIP_READ(_IMR_)
*/ */
#define getIMR() \ #define getIMR() \
WIZCHIP_READ(IMR2) (WIZCHIP_READ(IMR2) & 0xA0)
/** /**
* @ingroup Common_register_access_function_W5200 * @ingroup Common_register_access_function_W5200
@ -1517,7 +1529,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
WIZCHIP_WRITE(IMR2, (imr2 & 0xA0)) WIZCHIP_WRITE(IMR2, (imr2 & 0xA0))
*/ */
#define setIMR2(imr2) \ #define setIMR2(imr2) \
WIZCHIP_WRITE(_IMR_, (imr2 & 0xA0)) WIZCHIP_WRITE(_IMR_, imr2)
#define setSIMR(imr2) setIMR2(imr2) #define setSIMR(imr2) setIMR2(imr2)
/** /**
@ -1532,7 +1544,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
(WIZCHIP_READ(IMR2) & 0xA0) (WIZCHIP_READ(IMR2) & 0xA0)
*/ */
#define getIMR2() \ #define getIMR2() \
(WIZCHIP_READ(_IMR_) & 0xA0) WIZCHIP_READ(_IMR_)
#define getSIMR() getIMR2() #define getSIMR() getIMR2()
/////////////////////////////////// ///////////////////////////////////
// Socket N register I/O function // // Socket N register I/O function //
@ -1739,8 +1751,13 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
* @param (uint8_t)proto Value to set \ref Sn_PROTO * @param (uint8_t)proto Value to set \ref Sn_PROTO
* @sa getSn_PROTO() * @sa getSn_PROTO()
*/ */
//M20150601 : Fixed Wrong Register address
/*
#define setSn_PROTO(sn, proto) \ #define setSn_PROTO(sn, proto) \
WIZCHIP_WRITE(Sn_TOS(sn), tos) WIZCHIP_WRITE(Sn_TOS(sn), tos)
*/
#define setSn_PROTO(sn, proto) \
WIZCHIP_WRITE(Sn_PROTO(sn), proto)
/** /**
* @ingroup Socket_register_access_function_W5200 * @ingroup Socket_register_access_function_W5200
@ -1749,8 +1766,13 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
* @return uint8_t. Value of @ref Sn_PROTO. * @return uint8_t. Value of @ref Sn_PROTO.
* @sa setSn_PROTO() * @sa setSn_PROTO()
*/ */
//M20150601 : Fixed Wrong Register address
/*
#define getSn_PROTO(sn) \ #define getSn_PROTO(sn) \
WIZCHIP_READ(Sn_TOS(sn)) WIZCHIP_READ(Sn_TOS(sn))
*/
#define getSn_PROTO(sn) \
WIZCHIP_READ(Sn_PROTO(sn))
/** /**
* @ingroup Socket_register_access_function_W5200 * @ingroup Socket_register_access_function_W5200
@ -1903,7 +1925,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
* @ingroup Socket_register_access_function_W5200 * @ingroup Socket_register_access_function_W5200
* @brief Get @ref Sn_RX_RD register * @brief Get @ref Sn_RX_RD register
* @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @regurn uint16_t. Value of @ref Sn_RX_RD. * @return uint16_t. Value of @ref Sn_RX_RD.
* @sa setSn_RX_RD() * @sa setSn_RX_RD()
*/ */
#define getSn_RX_RD(sn) \ #define getSn_RX_RD(sn) \
@ -1956,7 +1978,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
* @brief Set @ref Sn_FRAG register * @brief Set @ref Sn_FRAG register
* @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param (uint16_t)frag Value to set \ref Sn_FRAG * @param (uint16_t)frag Value to set \ref Sn_FRAG
* @sa getSn_FRAD() * @sa getSn_FRAG()
*/ */
#define setSn_FRAG(sn, frag) { \ #define setSn_FRAG(sn, frag) { \
WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \ WIZCHIP_WRITE(Sn_FRAG(sn), (uint8_t)(frag >>8)); \
@ -2037,7 +2059,6 @@ uint16_t getSn_TxBASE(uint8_t sn);
* and updates the Tx write pointer register. * and updates the Tx write pointer register.
* This function is being called by send() and sendto() function also. * This function is being called by send() and sendto() function also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param wizdata Pointer buffer to write data * @param wizdata Pointer buffer to write data
* @param len Data length * @param len Data length
@ -2054,7 +2075,6 @@ void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
* to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes. * to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
* This function is being called by recv() also. * This function is being called by recv() also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>. * @param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
* @param wizdata Pointer buffer to read data * @param wizdata Pointer buffer to read data
* @param len Data length * @param len Data length
@ -2071,7 +2091,9 @@ void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
*/ */
void wiz_recv_ignore(uint8_t sn, uint16_t len); void wiz_recv_ignore(uint8_t sn, uint16_t len);
/// \cond DOXY_APPLY_CODE
#endif #endif
/// \endcond
#endif //_W5200_H_ #endif //_W5200_H_

225
Ethernet/W5300/w5300.c Normal file
View File

@ -0,0 +1,225 @@
//*****************************************************************************
//
//! \file w5300.h
//! \brief W5300 HAL implement File.
//! \version 1.0.0
//! \date 2015/05/01
//! \par Revision history
//! <2015/05/01> 1st Released for integrating with ioLibrary
//! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
//! >> https://github.com/Wiznet/ioLibrary_Driver
//! \author MidnightCow
//! \copyright
//!
//! Copyright (c) 2015, WIZnet Co., LTD.
//! All rights reserved.
//!
//! Redistribution and use in source and binary forms, with or without
//! modification, are permitted provided that the following conditions
//! are met:
//!
//! * Redistributions of source code must retain the above copyright
//! notice, this list of conditions and the following disclaimer.
//! * Redistributions in binary form must reproduce the above copyright
//! notice, this list of conditions and the following disclaimer in the
//! documentation and/or other materials provided with the distribution.
//! * Neither the name of the <ORGANIZATION> nor the names of its
//! contributors may be used to endorse or promote products derived
//! from this software without specific prior written permission.
//!
//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
//! THE POSSIBILITY OF SUCH DAMAGE.
//
//*****************************************************************************
#include <stdint.h>
#include "wizchip_conf.h"
#if _WIZCHIP_ == 5300
extern uint8_t sock_remained_byte[_WIZCHIP_SOCK_NUM_];
extern uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_];
/***********************
* Basic I/O Function *
***********************/
void WIZCHIP_WRITE(uint32_t AddrSel, uint16_t wb )
{
WIZCHIP_CRITICAL_ENTER();
WIZCHIP.CS._select();
#if ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
#if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
WIZCHIP.IF.BUS._write_data(AddrSel, (uint8_t)(wb>>8));
WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(AddrSel,1),(uint8_t)wb);
#elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
WIZCHIP.IF.BUS._write_data(AddrSel, wb);
#else
#error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
#endif
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
#if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
WIZCHIP.IF.BUS._write_data(IDM_AR, (uint8_t)(AddrSel >> 8));
WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_AR,1),(uint8_t)AddrSel);
WIZCHIP.IF.BUS._write_data(IDM_DR,(uint8_t)(wb>>8));
WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_DR,1),(uint8_t)wb);
#elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
WIZCHIP.IF.BUS._write_data(IDM_AR, (uint16_t)AddrSel);
WIZCHIP.IF.BUS._write_data(IDM_DR, wb);
#else
#error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
#endif
#else
#error "Unknown _WIZCHIP_IO_MODE_ in W5300. !!!"
#endif
WIZCHIP.CS._deselect();
WIZCHIP_CRITICAL_EXIT();
}
uint16_t WIZCHIP_READ(uint32_t AddrSel)
{
uint16_t ret;
WIZCHIP_CRITICAL_ENTER();
WIZCHIP.CS._select();
#if ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_DIR_) )
#if (_WIZCHIP_IO_BUS_WIDTH_ == 8)
ret = (((uint16_t)WIZCHIP.IF.BUS._read_data(AddrSel)) << 8) |
(((uint16_t)WIZCHIP.IF.BUS._read_data(WIZCHIP_OFFSET_INC(AddrSel,1))) & 0x00FF) ;
#elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
ret = WIZCHIP.IF.BUS._read_data(AddrSel);
#else
#error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
#endif
#elif ( (_WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_) )
#if(_WIZCHIP_IO_BUS_WIDTH_ == 8)
WIZCHIP.IF.BUS._write_data(IDM_AR, (uint8_t)(AddrSel >> 8));
WIZCHIP.IF.BUS._write_data(WIZCHIP_OFFSET_INC(IDM_AR,1),(uint8_t)AddrSel);
ret = (((uint16_t)WIZCHIP.IF.BUS._read_data(IDM_DR)) << 8) |
(((uint16_t)WIZCHIP.IF.BUS._read_data(WIZCHIP_OFFSET_INC(IDM_DR,1))) & 0x00FF);
#elif(_WIZCHIP_IO_BUS_WIDTH_ == 16)
WIZCHIP.IF.BUS._write_data(IDM_AR, (uint16_t)AddrSel);
ret = WIZCHIP.IF.BUS._read_data(IDM_DR);
#else
#error "Abnoraml _WIZCHIP_IO_BUS_WIDTH_. Should be 8 or 16"
#endif
#else
#error "Unknown _WIZCHIP_IO_MODE_ in W5300. !!!"
#endif
WIZCHIP.CS._deselect();
WIZCHIP_CRITICAL_EXIT();
return ret;
}
void setTMSR(uint8_t sn,uint8_t tmsr)
{
uint16_t tmem;
tmem = WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE)));
if(sn & 0x01) tmem = (tmem & 0xFF00) | (((uint16_t)tmsr ) & 0x00FF) ;
else tmem = (tmem & 0x00FF) | (((uint16_t)tmsr) << 8) ;
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE)),tmem);
}
uint8_t getTMSR(uint8_t sn)
{
if(sn & 0x01)
return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE))) & 0x00FF);
return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(TMS01R, (sn & 0xFE))) >> 8);
}
void setRMSR(uint8_t sn,uint8_t rmsr)
{
uint16_t rmem;
rmem = WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE)));
if(sn & 0x01) rmem = (rmem & 0xFF00) | (((uint16_t)rmsr ) & 0x00FF) ;
else rmem = (rmem & 0x00FF) | (((uint16_t)rmsr) << 8) ;
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE)),rmem);
}
uint8_t getRMSR(uint8_t sn)
{
if(sn & 0x01)
return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE))) & 0x00FF);
return (uint8_t)(WIZCHIP_READ(WIZCHIP_OFFSET_INC(RMS01R, (sn & 0xFE))) >> 8);
}
uint32_t getSn_TX_FSR(uint8_t sn)
{
uint32_t free_tx_size=0;
uint32_t free_tx_size1=1;
while(1)
{
free_tx_size = (((uint32_t)WIZCHIP_READ(Sn_TX_FSR(sn))) << 16) |
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),2))) & 0x0000FFFF); // read
if(free_tx_size == free_tx_size1) break; // if first == sencond, Sn_TX_FSR value is valid.
free_tx_size1 = free_tx_size; // save second value into first
}
return free_tx_size;
}
uint32_t getSn_RX_RSR(uint8_t sn)
{
uint32_t received_rx_size=0;
uint32_t received_rx_size1=1;
while(1)
{
received_rx_size = (((uint32_t)WIZCHIP_READ(Sn_RX_RSR(sn))) << 16) |
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),2))) & 0x0000FFFF);
if(received_rx_size == received_rx_size1) break;
received_rx_size1 = received_rx_size; // if first == sencond, Sn_RX_RSR value is valid.
} // save second value into first
return received_rx_size + (uint32_t)((sock_pack_info[sn] & 0x02) ? 1 : 0);
}
void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint32_t len)
{
uint32_t i = 0;
if(len == 0) return;
for(i = 0; i < len ; i += 2)
setSn_TX_FIFOR(sn, (((uint16_t)wizdata[i]) << 8) | (((uint16_t)wizdata[i+1]) & 0x00FF))
}
void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint32_t len)
{
uint16_t rd = 0;
uint32_t i = 0;
if(len == 0) return;
for(i = 0; i < len; i++)
{
if((i & 0x01)==0)
{
rd = getSn_RX_FIFOR(sn);
wizdata[i] = (uint8_t)(rd >> 8);
}
else wizdata[i] = (uint8_t)rd; // For checking the memory access violation
}
sock_remained_byte[sn] = (uint8_t)rd; // back up the remaind fifo byte.
}
void wiz_recv_ignore(uint8_t sn, uint32_t len)
{
uint32_t i = 0;
for(i = 0; i < len ; i += 2) getSn_RX_FIFOR(sn);
}
#endif

2327
Ethernet/W5300/w5300.h Normal file

File diff suppressed because it is too large Load Diff

View File

@ -51,7 +51,9 @@
#include <stdint.h> #include <stdint.h>
#include "wizchip_conf.h" #include "wizchip_conf.h"
/// @cond DOXY_APPLY_CODE
#if (_WIZCHIP_ == 5500) #if (_WIZCHIP_ == 5500)
/// @endcond
#define _W5500_IO_BASE_ 0x00000000 #define _W5500_IO_BASE_ 0x00000000
@ -266,10 +268,10 @@
/** /**
* @ingroup Common_register_group * @ingroup Common_register_group
* @brief Interrupt mask register(R/W) * @brief Interrupt mask register(R/W)
* @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR. * @details @ref _IMR_ is used to mask interrupts. Each bit of @ref _IMR_ corresponds to each bit of @ref IR.
* When a bit of @ref IMR is and the corresponding bit of @ref IR is an interrupt will be issued. In other words, * When a bit of @ref _IMR_ is and the corresponding bit of @ref IR is an interrupt will be issued. In other words,
* if a bit of @ref IMR is an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n * if a bit of @ref _IMR_ is an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n
* Each bit of @ref IMR defined as the following. * Each bit of @ref _IMR_ defined as the following.
* <table> * <table>
* <tr> <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td> </tr> * <tr> <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td> </tr>
* <tr> <td>IM_IR7</td> <td>IM_IR6</td> <td>IM_IR5</td> <td>IM_IR4</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr> * <tr> <td>IM_IR7</td> <td>IM_IR6</td> <td>IM_IR5</td> <td>IM_IR4</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>
@ -303,7 +305,7 @@
/** /**
* @ingroup Common_register_group * @ingroup Common_register_group
* @brief Timeout register address( 1 is 100us )(R/W) * @brief Timeout register address( 1 is 100us )(R/W)
* @details @ref _RTR_ configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref _RTR_ is x07D0or 000 * @details @ref _RTR_ configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref _RTR_ is x07D0.
* And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref _RTR_, W5500 waits for the peer response * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref _RTR_, W5500 waits for the peer response
* to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command). * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command).
* If the peer does not respond within the @ref _RTR_ time, W5500 retransmits the packet or issues timeout. * If the peer does not respond within the @ref _RTR_ time, W5500 retransmits the packet or issues timeout.
@ -316,7 +318,7 @@
* @ingroup Common_register_group * @ingroup Common_register_group
* @brief Retry count register(R/W) * @brief Retry count register(R/W)
* @details @ref _RCR_ configures the number of time of retransmission. * @details @ref _RCR_ configures the number of time of retransmission.
* When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = . * When retransmission occurs as many as ref _RCR_+1 Timeout interrupt is issued (@ref Sn_IR_TIMEOUT = '1').
*/ */
//M20150401 : Rename SYMBOE ( Re-define error in a compile) //M20150401 : Rename SYMBOE ( Re-define error in a compile)
//#define RCR (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3)) //#define RCR (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3))
@ -361,7 +363,7 @@
* @ingroup Common_register_group * @ingroup Common_register_group
* @brief Unreachable IP register address in UDP mode(R) * @brief Unreachable IP register address in UDP mode(R)
* @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
* which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates * which socket is not open and @ref IR_UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates
* the destination IP address & port number respectively. * the destination IP address & port number respectively.
*/ */
#define UIPR (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3)) #define UIPR (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3))
@ -370,7 +372,7 @@
* @ingroup Common_register_group * @ingroup Common_register_group
* @brief Unreachable Port register address in UDP mode(R) * @brief Unreachable Port register address in UDP mode(R)
* @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
* which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR * which socket is not open and @ref IR_UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR
* indicates the destination IP address & port number respectively. * indicates the destination IP address & port number respectively.
*/ */
#define UPORTR (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3)) #define UPORTR (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3))
@ -498,7 +500,7 @@
* @ingroup Socket_register_group * @ingroup Socket_register_group
* @brief source port register(R/W) * @brief source port register(R/W)
* @details @ref Sn_PORT configures the source port number of Socket n. * @details @ref Sn_PORT configures the source port number of Socket n.
* It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered. * It is valid when Socket n is used in TCP/UDP mode. It should be set before OPEN command is ordered.
*/ */
#define Sn_PORT(N) (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) #define Sn_PORT(N) (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
@ -514,8 +516,8 @@
* @ingroup Socket_register_group * @ingroup Socket_register_group
* @brief Peer IP register address(R/W) * @brief Peer IP register address(R/W)
* @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode. * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode.
* In TCP client mode, it configures an IP address of <EFBFBD>TCP serverbefore CONNECT command. * In TCP client mode, it configures an IP address of TCP serverbefore CONNECT command.
* In TCP server mode, it indicates an IP address of <EFBFBD>TCP clientafter successfully establishing connection. * In TCP server mode, it indicates an IP address of TCP clientafter successfully establishing connection.
* In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command. * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
*/ */
#define Sn_DIPR(N) (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) #define Sn_DIPR(N) (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
@ -524,8 +526,8 @@
* @ingroup Socket_register_group * @ingroup Socket_register_group
* @brief Peer port register address(R/W) * @brief Peer port register address(R/W)
* @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode. * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode.
* In <EFBFBD>TCP clientmode, it configures the listen port number of <EFBFBD>TCP serverbefore CONNECT command. * In TCP clientmode, it configures the listen port number of TCP serverbefore CONNECT command.
* In <EFBFBD>TCP Servermode, it indicates the port number of TCP client after successfully establishing connection. * In TCP Servermode, it indicates the port number of TCP client after successfully establishing connection.
* In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command. * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
*/ */
#define Sn_DPORT(N) (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) #define Sn_DPORT(N) (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
@ -926,46 +928,46 @@
* The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n
* <table> * <table>
* <tr> <td>\b Sn_MR (P[3:0])</td> <td>\b Sn_SR</td> </tr> * <tr> <td>\b Sn_MR (P[3:0])</td> <td>\b Sn_SR</td> </tr>
* <tr> <td>Sn_MR_CLOSE (000</td> <td></td> </tr> * <tr> <td>Sn_MR_CLOSE (000)</td> <td></td> </tr>
* <tr> <td>Sn_MR_TCP (001</td> <td>SOCK_INIT (0x13)</td> </tr> * <tr> <td>Sn_MR_TCP (001)</td> <td>SOCK_INIT (0x13)</td> </tr>
* <tr> <td>Sn_MR_UDP (010</td> <td>SOCK_UDP (0x22)</td> </tr> * <tr> <td>Sn_MR_UDP (010)</td> <td>SOCK_UDP (0x22)</td> </tr>
* <tr> <td>S0_MR_MACRAW (100</td> <td>SOCK_MACRAW (0x02)</td> </tr> * <tr> <td>S0_MR_MACRAW (100)</td> <td>SOCK_MACRAW (0x02)</td> </tr>
* </table> * </table>
*/ */
#define Sn_CR_OPEN 0x01 #define Sn_CR_OPEN 0x01
/** /**
* @brief Wait connection request in TCP mode(Server mode) * @brief Wait connection request in TCP mode(Server mode)
* @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP). * @details This is valid only in TCP mode (\ref Sn_MR(P3:P0) = \ref Sn_MR_TCP).
* In this mode, Socket n operates as a <EFBFBD>TCP serverand waits for connection-request (SYN packet) from any <EFBFBD>TCP client * In this mode, Socket n operates as a TCP serverand waits for connection-request (SYN packet) from any TCP client
* The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN. * The @ref Sn_SR changes the state from \ref SOCK_INIT to \ref SOCKET_LISTEN.
* When a <EFBFBD>TCP clientconnection request is successfully established, * When a TCP clientconnection request is successfully established,
* the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the @ref Sn_IR(0) becomes
* But when a <EFBFBD>TCP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED. * But when a TCP clientconnection request is failed, @ref Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED.
*/ */
#define Sn_CR_LISTEN 0x02 #define Sn_CR_LISTEN 0x02
/** /**
* @brief Send connection request in TCP mode(Client mode) * @brief Send connection request in TCP mode(Client mode)
* @details To connect, a connect-request (SYN packet) is sent to b>TCP server</b>configured by @ref Sn_DIPR & Sn_DPORT(destination address & port). * @details To connect, a connect-request (SYN packet) is sent to <b>TCP server</b>configured by @ref Sn_DIPR & Sn_DPORT(destination address & port).
* If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n
* The connect-request fails in the following three cases.\n * The connect-request fails in the following three cases.\n
* 1. When a @b ARPTO occurs (@ref Sn_IR[3] = ) because destination hardware address is not acquired through the ARP-process.\n * 1. When a @b ARPTO occurs (@ref Sn_IR[3] = ) because destination hardware address is not acquired through the ARP-process.\n
* 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) = )\n * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) = )\n
* 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED. * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED.
* @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client</b> * @note This is valid only in TCP mode and operates when Socket n acts as <b>TCP client</b>
*/ */
#define Sn_CR_CONNECT 0x04 #define Sn_CR_CONNECT 0x04
/** /**
* @brief Send closing request in TCP mode * @brief Send closing request in TCP mode
* @details Regardless of b>TCP server</b>or b>TCP client</b> the DISCON command processes the disconnect-process (b>Active close</b>or b>Passive close</b>.\n * @details Regardless of <b>TCP server</b>or <b>TCP client</b> the DISCON command processes the disconnect-process (b>Active close</b>or <b>Passive close</b>.\n
* @par Active close * @par Active close
* it transmits disconnect-request(FIN packet) to the connected peer\n * it transmits disconnect-request(FIN packet) to the connected peer\n
* @par Passive close * @par Passive close
* When FIN packet is received from peer, a FIN packet is replied back to the peer.\n * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n
* @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n
* Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED. * Otherwise, TCPTO occurs (\ref Sn_IR(3)='1') and then @ref Sn_SR is changed to @ref SOCK_CLOSED.
* @note Valid only in TCP mode. * @note Valid only in TCP mode.
*/ */
#define Sn_CR_DISCON 0x08 #define Sn_CR_DISCON 0x08
@ -1044,24 +1046,24 @@
/* Sn_SR values */ /* Sn_SR values */
/** /**
* @brief Closed * @brief Closed
* @details This indicates that Socket n is released.\N * @details This indicates that Socket n is released.\n
* When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status. * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status.
*/ */
#define SOCK_CLOSED 0x00 #define SOCK_CLOSED 0x00
/** /**
* @brief Initiate state * @brief Initiate state
* @details This indicates Socket n is opened with TCP mode.\N * @details This indicates Socket n is opened with TCP mode.\n
* It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N * It is changed to @ref SOCK_INIT when @ref Sn_MR(P[3:0]) = 001 and OPEN command is ordered.\n
* After @ref SOCK_INIT, user can use LISTEN /CONNECT command. * After @ref SOCK_INIT, user can use LISTEN /CONNECT command.
*/ */
#define SOCK_INIT 0x13 #define SOCK_INIT 0x13
/** /**
* @brief Listen state * @brief Listen state
* @details This indicates Socket n is operating as b>TCP server</b>mode and waiting for connection-request (SYN packet) from a peer (b>TCP client</b>.\n * @details This indicates Socket n is operating as <b>TCP server</b>mode and waiting for connection-request (SYN packet) from a peer <b>TCP client</b>.\n
* It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n
* Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = . * Otherwise it will change to @ref SOCK_CLOSED after TCPTO @ref Sn_IR(TIMEOUT) = '1') is occurred.
*/ */
#define SOCK_LISTEN 0x14 #define SOCK_LISTEN 0x14
@ -1070,7 +1072,7 @@
* @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n
* It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n
* If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n
* Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] = is occurred. * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] = '1') is occurred.
*/ */
#define SOCK_SYNSENT 0x15 #define SOCK_SYNSENT 0x15
@ -1078,14 +1080,14 @@
* @brief Connection state * @brief Connection state
* @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n
* If socket n sends the response (SYN/ACK packet) to the peer successfully, it changes to @ref SOCK_ESTABLISHED. \n * If socket n sends the response (SYN/ACK packet) to the peer successfully, it changes to @ref SOCK_ESTABLISHED. \n
* If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = . * If not, it changes to @ref SOCK_CLOSED after timeout (@ref Sn_IR[TIMEOUT] = '1') is occurred.
*/ */
#define SOCK_SYNRECV 0x16 #define SOCK_SYNRECV 0x16
/** /**
* @brief Success to connect * @brief Success to connect
* @details This indicates the status of the connection of Socket n.\n * @details This indicates the status of the connection of Socket n.\n
* It changes to @ref SOCK_ESTABLISHED when the b>TCP SERVER</b>processed the SYN packet from the b>TCP CLIENT</b>during @ref SOCK_LISTEN, or * It changes to @ref SOCK_ESTABLISHED when the <b>TCP SERVER</b>processed the SYN packet from the <b>TCP CLIENT</b>during @ref SOCK_LISTEN, or
* when the CONNECT command is successful.\n * when the CONNECT command is successful.\n
* During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command. * During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command.
*/ */
@ -1126,14 +1128,14 @@
/** /**
* @brief Closing state * @brief Closing state
* @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n * @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n
* It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs (@ref Sn_IR[TIMEOUT] = . * It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout(@ref Sn_IR[TIMEOUT] = '1') is occurred.
*/ */
#define SOCK_LAST_ACK 0x1D #define SOCK_LAST_ACK 0x1D
/** /**
* @brief UDP socket * @brief UDP socket
* @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010.\n * @details This indicates Socket n is opened in UDP mode(@ref Sn_MR(P[3:0]) = '010').\n
* It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n * It changes to SOCK_UDP when @ref Sn_MR(P[3:0]) = '010' and @ref Sn_CR_OPEN command is ordered.\n
* Unlike TCP mode, data can be transfered without the connection-process. * Unlike TCP mode, data can be transfered without the connection-process.
*/ */
#define SOCK_UDP 0x22 #define SOCK_UDP 0x22
@ -1508,7 +1510,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
/** /**
* @ingroup Common_register_access_function * @ingroup Common_register_access_function
* @brief Set PHAR address * @brief Set @ref PHAR address
* @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes. * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes.
* @sa getPHAR() * @sa getPHAR()
*/ */
@ -1517,7 +1519,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
/** /**
* @ingroup Common_register_access_function * @ingroup Common_register_access_function
* @brief Get local IP address * @brief Get @ref PHAR address
* @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes. * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes.
* @sa setPHAR() * @sa setPHAR()
*/ */
@ -1783,7 +1785,7 @@ void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
* @brief Get @ref Sn_DIPR register * @brief Get @ref Sn_DIPR register
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes. * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes.
* @sa SetSn_DIPR() * @sa setSn_DIPR()
*/ */
#define getSn_DIPR(sn, dipr) \ #define getSn_DIPR(sn, dipr) \
WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4) WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4)
@ -2000,7 +2002,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
* @ingroup Socket_register_access_function * @ingroup Socket_register_access_function
* @brief Get @ref Sn_RX_RD register * @brief Get @ref Sn_RX_RD register
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @regurn uint16_t. Value of @ref Sn_RX_RD. * @return uint16_t. Value of @ref Sn_RX_RD.
* @sa setSn_RX_RD() * @sa setSn_RX_RD()
*/ */
//M20150401 : Type explict declaration //M20150401 : Type explict declaration
@ -2078,6 +2080,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
// Sn_TXBUF & Sn_RXBUF IO function // // Sn_TXBUF & Sn_RXBUF IO function //
///////////////////////////////////// /////////////////////////////////////
/** /**
* @brief Socket_register_access_function
* @brief Gets the max buffer size of socket sn passed as parameter. * @brief Gets the max buffer size of socket sn passed as parameter.
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @return uint16_t. Value of Socket n RX max buffer size. * @return uint16_t. Value of Socket n RX max buffer size.
@ -2091,6 +2094,7 @@ uint16_t getSn_RX_RSR(uint8_t sn);
(((uint16_t)getSn_RXBUF_SIZE(sn)) << 10) (((uint16_t)getSn_RXBUF_SIZE(sn)) << 10)
/** /**
* @brief Socket_register_access_function
* @brief Gets the max buffer size of socket sn passed as parameters. * @brief Gets the max buffer size of socket sn passed as parameters.
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @return uint16_t. Value of Socket n TX max buffer size. * @return uint16_t. Value of Socket n TX max buffer size.
@ -2112,7 +2116,6 @@ uint16_t getSn_RX_RSR(uint8_t sn);
* and updates the Tx write pointer register. * and updates the Tx write pointer register.
* This function is being called by send() and sendto() function also. * This function is being called by send() and sendto() function also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @param wizdata Pointer buffer to write data * @param wizdata Pointer buffer to write data
* @param len Data length * @param len Data length
@ -2129,7 +2132,6 @@ void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
* to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes. * to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
* This function is being called by recv() also. * This function is being called by recv() also.
* *
* @note User should read upper byte first and lower byte later to get proper value.
* @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
* @param wizdata Pointer buffer to read data * @param wizdata Pointer buffer to read data
* @param len Data length * @param len Data length
@ -2146,6 +2148,8 @@ void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
*/ */
void wiz_recv_ignore(uint8_t sn, uint16_t len); void wiz_recv_ignore(uint8_t sn, uint16_t len);
/// @cond DOXY_APPLY_CODE
#endif #endif
/// @endcond
#endif // _W5500_H_ #endif // _W5500_H_

View File

@ -62,13 +62,24 @@
static uint16_t sock_any_port = SOCK_ANY_PORT_NUM; static uint16_t sock_any_port = SOCK_ANY_PORT_NUM;
static uint16_t sock_io_mode = 0; static uint16_t sock_io_mode = 0;
static uint16_t sock_is_sending = 0; static uint16_t sock_is_sending = 0;
static uint16_t sock_remained_size[_WIZCHIP_SOCK_NUM_] = {0,0,}; static uint16_t sock_remained_size[_WIZCHIP_SOCK_NUM_] = {0,0,};
static uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_] = {0,};
//M20150601 : For extern decleation
//static uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_] = {0,};
uint8_t sock_pack_info[_WIZCHIP_SOCK_NUM_] = {0,};
//
#if _WIZCHIP_ == 5200 #if _WIZCHIP_ == 5200
static uint16_t sock_next_rd[_WIZCHIP_SOCK_NUM_] ={0,}; static uint16_t sock_next_rd[_WIZCHIP_SOCK_NUM_] ={0,};
#endif #endif
//A20150601 : For integrating with W5300
#if _WIZCHIP_ == 5300
uint8_t sock_remained_byte[_WIZCHIP_SOCK_NUM_] = {0,}; // set by wiz_recv_data()
#endif
#define CHECK_SOCKNUM() \ #define CHECK_SOCKNUM() \
do{ \ do{ \
if(sn > _WIZCHIP_SOCK_NUM_) return SOCKERR_SOCKNUM; \ if(sn > _WIZCHIP_SOCK_NUM_) return SOCKERR_SOCKNUM; \
@ -98,8 +109,13 @@ int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
{ {
case Sn_MR_TCP : case Sn_MR_TCP :
{ {
//M20150601 : Fixed the warning - taddr will never be NULL
/*
uint8_t taddr[4]; uint8_t taddr[4];
getSIPR(taddr); getSIPR(taddr);
*/
uint32_t taddr;
getSIPR((uint8_t*)&taddr);
if(taddr == 0) return SOCKERR_SOCKINIT; if(taddr == 0) return SOCKERR_SOCKINIT;
} }
case Sn_MR_UDP : case Sn_MR_UDP :
@ -113,7 +129,9 @@ int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
default : default :
return SOCKERR_SOCKMODE; return SOCKERR_SOCKMODE;
} }
if((flag & 0x06) != 0) return SOCKERR_SOCKFLAG; //M20150601 : For SF_TCP_ALIGN & W5300
//if((flag & 0x06) != 0) return SOCKERR_SOCKFLAG;
if((flag & 0x04) != 0) return SOCKERR_SOCKFLAG;
#if _WIZCHIP_ == 5200 #if _WIZCHIP_ == 5200
if(flag & 0x10) return SOCKERR_SOCKFLAG; if(flag & 0x10) return SOCKERR_SOCKFLAG;
#endif #endif
@ -123,7 +141,13 @@ int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
switch(protocol) switch(protocol)
{ {
case Sn_MR_TCP: case Sn_MR_TCP:
//M20150601 : For SF_TCP_ALIGN & W5300
#if _WIZCHIP_ == 5300
if((flag & (SF_TCP_NODELAY|SF_IO_NONBLOCK|SF_TCP_ALIGN))==0) return SOCKERR_SOCKFLAG;
#else
if((flag & (SF_TCP_NODELAY|SF_IO_NONBLOCK))==0) return SOCKERR_SOCKFLAG; if((flag & (SF_TCP_NODELAY|SF_IO_NONBLOCK))==0) return SOCKERR_SOCKFLAG;
#endif
break; break;
case Sn_MR_UDP: case Sn_MR_UDP:
if(flag & SF_IGMP_VER2) if(flag & SF_IGMP_VER2)
@ -142,7 +166,12 @@ int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
} }
} }
close(sn); close(sn);
//M20150601
#if _WIZCHIP_ == 5300
setSn_MR(sn, ((uint16_t)(protocol | (flag & 0xF0))) | (((uint16_t)(flag & 0x02)) << 7) );
#else
setSn_MR(sn, (protocol | (flag & 0xF0))); setSn_MR(sn, (protocol | (flag & 0xF0)));
#endif
if(!port) if(!port)
{ {
port = sock_any_port++; port = sock_any_port++;
@ -157,7 +186,10 @@ int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag)
sock_io_mode |= ((flag & SF_IO_NONBLOCK) << sn); sock_io_mode |= ((flag & SF_IO_NONBLOCK) << sn);
sock_is_sending &= ~(1<<sn); sock_is_sending &= ~(1<<sn);
sock_remained_size[sn] = 0; sock_remained_size[sn] = 0;
sock_pack_info[sn] = 0; //M20150601 : repalce 0 with PACK_COMPLETED
//sock_pack_info[sn] = 0;
sock_pack_info[sn] = PACK_COMPLETED;
//
while(getSn_SR(sn) == SOCK_CLOSED); while(getSn_SR(sn) == SOCK_CLOSED);
return (int8_t)sn; return (int8_t)sn;
} }
@ -313,6 +345,11 @@ int32_t send(uint8_t sn, uint8_t * buf, uint16_t len)
#if _WIZCHIP_ == 5200 #if _WIZCHIP_ == 5200
sock_next_rd[sn] = getSn_TX_RD(sn) + len; sock_next_rd[sn] = getSn_TX_RD(sn) + len;
#endif #endif
#if _WIZCHIP_ == 5300
setSn_TX_WRSR(sn,len);
#endif
setSn_CR(sn,Sn_CR_SEND); setSn_CR(sn,Sn_CR_SEND);
/* wait to process the command... */ /* wait to process the command... */
while(getSn_CR(sn)); while(getSn_CR(sn));
@ -327,12 +364,26 @@ int32_t recv(uint8_t sn, uint8_t * buf, uint16_t len)
{ {
uint8_t tmp = 0; uint8_t tmp = 0;
uint16_t recvsize = 0; uint16_t recvsize = 0;
//A20150601 : For integarating with W5300
#if _WIZCHIP_ == 5300
uint8_t head[2];
uint16_t mr;
#endif
//
CHECK_SOCKNUM(); CHECK_SOCKNUM();
CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKMODE(Sn_MR_TCP);
CHECK_SOCKDATA(); CHECK_SOCKDATA();
recvsize = getSn_RxMAX(sn); recvsize = getSn_RxMAX(sn);
if(recvsize < len) len = recvsize; if(recvsize < len) len = recvsize;
//A20150601 : For Integrating with W5300
#if _WIZCHIP_ == 5300
//sock_pack_info[sn] = PACK_COMPLETED; // for clear
if(sock_remained_size[sn] == 0)
{
#endif
//
while(1) while(1)
{ {
recvsize = getSn_RX_RSR(sn); recvsize = getSn_RX_RSR(sn);
@ -357,10 +408,58 @@ int32_t recv(uint8_t sn, uint8_t * buf, uint16_t len)
if((sock_io_mode & (1<<sn)) && (recvsize == 0)) return SOCK_BUSY; if((sock_io_mode & (1<<sn)) && (recvsize == 0)) return SOCK_BUSY;
if(recvsize != 0) break; if(recvsize != 0) break;
}; };
#if _WIZCHIP_ == 5300
}
#endif
//A20150601 : For integrating with W5300
#if _WIZCHIP_ == 5300
if((sock_remained_size[sn] == 0) || (getSn_MR(sn) & Sn_MR_ALIGN))
{
mr = getMR();
if((getSn_MR(sn) & Sn_MR_ALIGN)==0)
{
wiz_recv_data(sn,head,2);
if(mr & MR_FS)
recvsize = (((uint16_t)head[1]) << 8) | ((uint16_t)head[0]);
else
recvsize = (((uint16_t)head[0]) << 8) | ((uint16_t)head[1]);
sock_pack_info[sn] = PACK_FIRST;
}
sock_remained_size[sn] = recvsize;
}
if(len > sock_remained_size[sn]) len = sock_remained_size[sn];
recvsize = len;
if(sock_pack_info[sn] & PACK_FIFOBYTE)
{
*buf = sock_remained_byte[sn];
buf++;
sock_pack_info[sn] &= ~(PACK_FIFOBYTE);
recvsize -= 1;
sock_remained_size[sn] -= 1;
}
if(recvsize != 0)
{
wiz_recv_data(sn, buf, recvsize);
setSn_CR(sn,Sn_CR_RECV);
while(getSn_CR(sn));
}
sock_remained_size[sn] -= recvsize;
if(sock_remained_size[sn] != 0)
{
sock_pack_info[sn] |= PACK_REMAINED;
if(recvsize & 0x1) sock_pack_info[sn] |= PACK_FIFOBYTE;
}
else sock_pack_info[sn] = PACK_COMPLETED;
if(getSn_MR(sn) & Sn_MR_ALIGN) sock_remained_size[sn] = 0;
//len = recvsize;
#else
if(recvsize < len) len = recvsize; if(recvsize < len) len = recvsize;
wiz_recv_data(sn, buf, len); wiz_recv_data(sn, buf, len);
setSn_CR(sn,Sn_CR_RECV); setSn_CR(sn,Sn_CR_RECV);
while(getSn_CR(sn)); while(getSn_CR(sn));
#endif
//M20150409 : Explicit Type Casting //M20150409 : Explicit Type Casting
//return len; //return len;
return (int32_t)len; return (int32_t)len;
@ -421,6 +520,11 @@ int32_t sendto(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t
else taddr = 0; else taddr = 0;
#endif #endif
//A20150601 : For W5300
#if _WIZCHIP_ == 5300
setSn_TX_WRSR(sn, len);
#endif
//
setSn_CR(sn,Sn_CR_SEND); setSn_CR(sn,Sn_CR_SEND);
/* wait to process the command... */ /* wait to process the command... */
while(getSn_CR(sn)); while(getSn_CR(sn));
@ -459,12 +563,24 @@ int32_t sendto(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t
int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port) int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port)
{ {
//M20150601 : For W5300
#if _WIZCHIP_ == 5300
uint16_t mr;
uint16_t mr1;
#else
uint8_t mr; uint8_t mr;
#endif
//
uint8_t head[8]; uint8_t head[8];
uint16_t pack_len=0; uint16_t pack_len=0;
CHECK_SOCKNUM(); CHECK_SOCKNUM();
//CHECK_SOCKMODE(Sn_MR_UDP); //CHECK_SOCKMODE(Sn_MR_UDP);
//A20150601
#if _WIZCHIP_ == 5300
mr1 = getMR();
#endif
switch((mr=getSn_MR(sn)) & 0x0F) switch((mr=getSn_MR(sn)) & 0x0F)
{ {
case Sn_MR_UDP: case Sn_MR_UDP:
@ -489,7 +605,8 @@ int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16
if(pack_len != 0) break; if(pack_len != 0) break;
}; };
} }
sock_pack_info[sn] = PACK_COMPLETED; //D20150601 : Move it to bottom
// sock_pack_info[sn] = PACK_COMPLETED;
switch (mr & 0x07) switch (mr & 0x07)
{ {
case Sn_MR_UDP : case Sn_MR_UDP :
@ -499,6 +616,22 @@ int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16
setSn_CR(sn,Sn_CR_RECV); setSn_CR(sn,Sn_CR_RECV);
while(getSn_CR(sn)); while(getSn_CR(sn));
// read peer's IP address, port number & packet length // read peer's IP address, port number & packet length
//A20150601 : For W5300
#if _WIZCHIP_ == 5300
if(mr1 & MR_FS)
{
addr[0] = head[1];
addr[1] = head[0];
addr[2] = head[3];
addr[3] = head[2];
*port = head[5];
*port = (*port << 8) + head[4];
sock_remained_size[sn] = head[7];
sock_remained_size[sn] = (sock_remained_size[sn] << 8) + head[6];
}
else
{
#endif
addr[0] = head[0]; addr[0] = head[0];
addr[1] = head[1]; addr[1] = head[1];
addr[2] = head[2]; addr[2] = head[2];
@ -507,10 +640,24 @@ int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16
*port = (*port << 8) + head[5]; *port = (*port << 8) + head[5];
sock_remained_size[sn] = head[6]; sock_remained_size[sn] = head[6];
sock_remained_size[sn] = (sock_remained_size[sn] << 8) + head[7]; sock_remained_size[sn] = (sock_remained_size[sn] << 8) + head[7];
#if _WIZCHIP_ == 5300
}
#endif
sock_pack_info[sn] = PACK_FIRST; sock_pack_info[sn] = PACK_FIRST;
} }
if(len < sock_remained_size[sn]) pack_len = len; if(len < sock_remained_size[sn]) pack_len = len;
else pack_len = sock_remained_size[sn]; else pack_len = sock_remained_size[sn];
//A20150601 : For W5300
len = pack_len;
#if _WIZCHIP_ == 5300
if(sock_pack_info[sn] & PACK_FIFOBYTE)
{
*buf++ = sock_remained_byte[sn];
pack_len -= 1;
sock_remained_size[sn] -= 1;
sock_pack_info[sn] &= ~PACK_FIFOBYTE;
}
#endif
// //
// Need to packet length check (default 1472) // Need to packet length check (default 1472)
// //
@ -570,9 +717,19 @@ int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16
/* wait to process the command... */ /* wait to process the command... */
while(getSn_CR(sn)) ; while(getSn_CR(sn)) ;
sock_remained_size[sn] -= pack_len; sock_remained_size[sn] -= pack_len;
//M20140501 : replace 0x01 with PACK_REMAINED //M20150601 :
//if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= 0x01; //if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= 0x01;
if(sock_remained_size[sn] != 0) sock_pack_info[sn] |= PACK_REMAINED; if(sock_remained_size[sn] != 0)
{
sock_pack_info[sn] |= PACK_REMAINED;
#if _WIZCHIP_ == 5300
if(pack_len & 0x01) sock_pack_info[sn] |= PACK_FIFOBYTE;
#endif
}
else sock_pack_info[sn] = PACK_COMPLETED;
#if _WIZCHIP_ == 5300
pack_len = len;
#endif
// //
//M20150409 : Explicit Type Casting //M20150409 : Explicit Type Casting
//return pack_len; //return pack_len;

View File

@ -113,16 +113,21 @@
/* /*
* SOCKET FLAG * SOCKET FLAG
*/ */
#define SF_ETHER_OWN (Sn_MR_MFEN) ///< In \ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet #define SF_ETHER_OWN (Sn_MR_MFEN) ///< In @ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet
#define SF_IGMP_VER2 (Sn_MR_MC) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2. #define SF_IGMP_VER2 (Sn_MR_MC) ///< In @ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2.
#define SF_TCP_NODELAY (Sn_MR_ND) ///< In \ref Sn_MR_TCP, Use to nodelayed ack. #define SF_TCP_NODELAY (Sn_MR_ND) ///< In @ref Sn_MR_TCP, Use to nodelayed ack.
#define SF_MULTI_ENABLE (Sn_MR_MULTI) ///< In \ref Sn_MR_UDP, Enable multicast mode. #define SF_MULTI_ENABLE (Sn_MR_MULTI) ///< In @ref Sn_MR_UDP, Enable multicast mode.
#if _WIZCHIP_ == 5500 #if _WIZCHIP_ == 5500
#define SF_BROAD_BLOCK (Sn_MR_BCASTB) ///< In \ref Sn_MR_UDP or \ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500 #define SF_BROAD_BLOCK (Sn_MR_BCASTB) ///< In @ref Sn_MR_UDP or @ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500
#define SF_MULTI_BLOCK (Sn_MR_MMB) ///< In \ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500 #define SF_MULTI_BLOCK (Sn_MR_MMB) ///< In @ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500
#define SF_IPv6_BLOCK (Sn_MR_MIP6B) ///< In \ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500 #define SF_IPv6_BLOCK (Sn_MR_MIP6B) ///< In @ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500
#define SF_UNI_BLOCK (Sn_MR_UCASTB) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500 #define SF_UNI_BLOCK (Sn_MR_UCASTB) ///< In @ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500
#endif
//A201505 : For W5300
#if _WIZCHIP_ == 5300
#define SF_TCP_ALIGN 0x02 ///< Valid only \ref Sn_MR_TCP and W5300, refer to \ref Sn_MR_ALIGN
#endif #endif
#define SF_IO_NONBLOCK 0x01 ///< Socket nonblock io mode. It used parameter in \ref socket(). #define SF_IO_NONBLOCK 0x01 ///< Socket nonblock io mode. It used parameter in \ref socket().
@ -130,9 +135,12 @@
/* /*
* UDP & MACRAW Packet Infomation * UDP & MACRAW Packet Infomation
*/ */
#define PACK_FIRST 0x80 ///< In Non-TCP packet, It indicates to start receiving a packet. #define PACK_FIRST 0x80 ///< In Non-TCP packet, It indicates to start receiving a packet. (When W5300, This flag can be applied)
#define PACK_REMAINED 0x01 ///< In Non-TCP packet, It indicates to remain a packet to be received. #define PACK_REMAINED 0x01 ///< In Non-TCP packet, It indicates to remain a packet to be received. (When W5300, This flag can be applied)
#define PACK_COMPLETED 0x00 ///< In Non-TCP packet, It indicates to complete to receive a packet. #define PACK_COMPLETED 0x00 ///< In Non-TCP packet, It indicates to complete to receive a packet. (When W5300, This flag can be applied)
//A20150601 : For Integrating with W5300
#define PACK_FIFOBYTE 0x02 ///< Valid only W5300, It indicate to have read already the Sn_RX_FIFOR.
//
/** /**
* @ingroup WIZnet_socket_APIs * @ingroup WIZnet_socket_APIs
@ -372,11 +380,11 @@ typedef enum
typedef enum typedef enum
{ {
SO_FLAG, ///< Valid only in getsockopt(), For set flag of socket refer to <I>flag</I> in @ref socket(). SO_FLAG, ///< Valid only in getsockopt(), For set flag of socket refer to <I>flag</I> in @ref socket().
SO_TTL, ///< Set/Get TTL. @ref Sn_TTL ( @ref setSn_TTL(), @ref getSn_TTL() ) SO_TTL, ///< Set TTL. @ref Sn_TTL ( @ref setSn_TTL(), @ref getSn_TTL() )
SO_TOS, ///< Set/Get TOS. @ref Sn_TOS ( @ref setSn_TOS(), @ref getSn_TOS() ) SO_TOS, ///< Set TOS. @ref Sn_TOS ( @ref setSn_TOS(), @ref getSn_TOS() )
SO_MSS, ///< Set/Get MSS. @ref Sn_MSSR ( @ref setSn_MSSR(), @ref getSn_MSSR() ) SO_MSS, ///< Set MSS. @ref Sn_MSSR ( @ref setSn_MSSR(), @ref getSn_MSSR() )
SO_DESTIP, ///< Set/Get the destination IP address. @ref Sn_DIPR ( @ref setSn_DIPR(), @ref getSn_DIPR() ) SO_DESTIP, ///< Set the destination IP address. @ref Sn_DIPR ( @ref setSn_DIPR(), @ref getSn_DIPR() )
SO_DESTPORT, ///< Set/Get the destination Port number. @ref Sn_DPORT ( @ref setSn_DPORT(), @ref getSn_DPORT() ) SO_DESTPORT, ///< Set the destination Port number. @ref Sn_DPORT ( @ref setSn_DPORT(), @ref getSn_DPORT() )
#if _WIZCHIP_ != 5100 #if _WIZCHIP_ != 5100
SO_KEEPALIVESEND, ///< Valid only in setsockopt. Manually send keep-alive packet in TCP mode, Not supported in W5100 SO_KEEPALIVESEND, ///< Valid only in setsockopt. Manually send keep-alive packet in TCP mode, Not supported in W5100
#if _WIZCHIP_ > 5200 #if _WIZCHIP_ > 5200

View File

@ -10,7 +10,7 @@
//! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary. //! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
//! >> https://github.com/Wiznet/ioLibrary_Driver //! >> https://github.com/Wiznet/ioLibrary_Driver
//! <2014/05/01> V1.0.1 Refer to M20140501 //! <2014/05/01> V1.0.1 Refer to M20140501
//! 1. Explicit type casting in wizchip_bus_readbyte() & wizchip_bus_writebyte() //! 1. Explicit type casting in wizchip_bus_readdata() & wizchip_bus_writedata()
// Issued by Mathias ClauBen. // Issued by Mathias ClauBen.
//! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t* //! uint32_t type converts into ptrdiff_t first. And then recoverting it into uint8_t*
//! For remove the warning when pointer type size is not 32bit. //! For remove the warning when pointer type size is not 32bit.
@ -95,21 +95,18 @@ void wizchip_cs_deselect(void) {}
* @note This function help not to access wrong address. If you do not describe this function or register any functions, * @note This function help not to access wrong address. If you do not describe this function or register any functions,
* null function is called. * null function is called.
*/ */
//M20140501 : Explict pointer type casting //M20150601 : Rename the function for integrating with W5300
//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); }; //uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
//uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }; iodata_t wizchip_bus_readdata(uint32_t AddrSel) { return * ((volatile iodata_t *)((ptrdiff_t) AddrSel)); }
uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *)((ptrdiff_t) AddrSel)); }
/** /**
* @brief Default function to write in direct or indirect interface. * @brief Default function to write in direct or indirect interface.
* @note This function help not to access wrong address. If you do not describe this function or register any functions, * @note This function help not to access wrong address. If you do not describe this function or register any functions,
* null function is called. * null function is called.
*/ */
//M20150601 : Rename the function for integrating with W5300
//M20140501 : Explict pointer type casting //void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
//void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*) AddrSel) = wb; }; void wizchip_bus_writedata(uint32_t AddrSel, iodata_t wb) { *((volatile iodata_t*)((ptrdiff_t)AddrSel)) = wb; }
//void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; };
void wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb) { *((volatile uint8_t*)((ptrdiff_t)AddrSel)) = wb; }
/** /**
* @brief Default function to read in SPI interface. * @brief Default function to read in SPI interface.
@ -173,8 +170,11 @@ _WIZCHIP WIZCHIP =
wizchip_cris_exit, wizchip_cris_exit,
wizchip_cs_select, wizchip_cs_select,
wizchip_cs_deselect, wizchip_cs_deselect,
wizchip_bus_readbyte, //M20150601 : Rename the function
wizchip_bus_writebyte //wizchip_bus_readbyte,
//wizchip_bus_writebyte
wizchip_bus_readdata,
wizchip_bus_writedata,
// wizchip_spi_readbyte, // wizchip_spi_readbyte,
// wizchip_spi_writebyte // wizchip_spi_writebyte
}; };
@ -211,10 +211,13 @@ void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
} }
} }
void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb)) //M20150515 : For integrating with W5300
//void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
void reg_wizchip_bus_cbfunc(iodata_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb))
{ {
while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_)); while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
//M20150601 : Rename call back function for integrating with W5300
/*
if(!bus_rb || !bus_wb) if(!bus_rb || !bus_wb)
{ {
WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte; WIZCHIP.IF.BUS._read_byte = wizchip_bus_readbyte;
@ -225,6 +228,17 @@ void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint
WIZCHIP.IF.BUS._read_byte = bus_rb; WIZCHIP.IF.BUS._read_byte = bus_rb;
WIZCHIP.IF.BUS._write_byte = bus_wb; WIZCHIP.IF.BUS._write_byte = bus_wb;
} }
*/
if(!bus_rb || !bus_wb)
{
WIZCHIP.IF.BUS._read_data = wizchip_bus_readdata;
WIZCHIP.IF.BUS._write_data = wizchip_bus_writedata;
}
else
{
WIZCHIP.IF.BUS._read_data = bus_rb;
WIZCHIP.IF.BUS._write_data = bus_wb;
}
} }
void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb)) void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
@ -290,7 +304,9 @@ int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
case CW_GET_INTRMASK: case CW_GET_INTRMASK:
*((intr_kind*)arg) = wizchip_getinterruptmask(); *((intr_kind*)arg) = wizchip_getinterruptmask();
break; break;
#if _WIZCHIP_ > 5100 //M20150601 : This can be supported by W5200, W5500
//#if _WIZCHIP_ > 5100
#if (_WIZCHIP_ == 5200 || _WIZCHIP_ == 5500)
case CW_SET_INTRTIME: case CW_SET_INTRTIME:
setINTLEVEL(*(uint16_t*)arg); setINTLEVEL(*(uint16_t*)arg);
break; break;
@ -372,10 +388,21 @@ void wizchip_sw_reset(void)
{ {
uint8_t gw[4], sn[4], sip[4]; uint8_t gw[4], sn[4], sip[4];
uint8_t mac[6]; uint8_t mac[6];
//A20150601
#if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
uint16_t mr = (uint16_t)getMR();
setMR(mr | MR_IND);
#endif
//
getSHAR(mac); getSHAR(mac);
getGAR(gw); getSUBR(sn); getSIPR(sip); getGAR(gw); getSUBR(sn); getSIPR(sip);
setMR(MR_RST); setMR(MR_RST);
getMR(); // for delay getMR(); // for delay
//A2015051 : For indirect bus mode
#if _WIZCHIP_IO_MODE_ == _WIZCHIP_IO_MODE_BUS_INDIR_
setMR(mr | MR_IND);
#endif
//
setSHAR(mac); setSHAR(mac);
setGAR(gw); setGAR(gw);
setSUBR(sn); setSUBR(sn);
@ -390,18 +417,44 @@ int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
if(txsize) if(txsize)
{ {
tmp = 0; tmp = 0;
//M20150601 : For integrating with W5300
#if _WIZCHIP_ == 5300
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
if(txsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
tmp += txsize[i];
if(tmp > 128) return -1;
}
if(tmp % 8) return -1;
#else
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
tmp += txsize[i]; tmp += txsize[i];
if(tmp > 16) return -1; if(tmp > 16) return -1;
}
#endif
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
setSn_TXBUF_SIZE(i, txsize[i]); setSn_TXBUF_SIZE(i, txsize[i]);
} }
if(rxsize) if(rxsize)
{ {
tmp = 0; tmp = 0;
#if _WIZCHIP_ == 5300
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
if(rxsize[i] >= 64) return -1; //No use 64KB even if W5300 support max 64KB memory allocation
tmp += rxsize[i];
if(tmp > 128) return -1;
}
if(tmp % 8) return -1;
#else
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
{
tmp += rxsize[i]; tmp += rxsize[i];
if(tmp > 16) return -1; if(tmp > 16) return -1;
}
#endif
for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
setSn_RXBUF_SIZE(i, rxsize[i]); setSn_RXBUF_SIZE(i, rxsize[i]);
} }
@ -426,6 +479,9 @@ void wizchip_clrinterrupt(intr_kind intr)
#if _WIZCHIP_ == 5100 #if _WIZCHIP_ == 5100
ir |= sir; ir |= sir;
setIR(ir); setIR(ir);
//A20150601 : For integrating with W5300
#elif _WIZCHIP_ == 5300
setIR( ((((uint16_t)ir) << 8) | (((uint16_t)sir) & 0x00FF)) );
#else #else
setIR(ir); setIR(ir);
setSIR(sir); setSIR(sir);
@ -440,12 +496,19 @@ intr_kind wizchip_getinterrupt(void)
#if _WIZCHIP_ == 5100 #if _WIZCHIP_ == 5100
ir = getIR(); ir = getIR();
sir = ir & 0x0F; sir = ir & 0x0F;
//A20150601 : For integrating with W5300
#elif _WIZCHIP_ == 5300
ret = getIR();
ir = (uint8_t)(ret >> 8);
sir = (uint8_t)ret;
#else #else
ir = getIR(); ir = getIR();
sir = getSIR(); sir = getSIR();
#endif #endif
#if _WIZCHIP_ < 5500 //M20150601 : For Integrating with W5300
//#if _WIZCHIP_ < 5500
#if _WIZCHIP_ < 5200
ir &= ~(1<<4); // IK_WOL ir &= ~(1<<4); // IK_WOL
#endif #endif
#if _WIZCHIP_ == 5200 #if _WIZCHIP_ == 5200
@ -471,6 +534,9 @@ void wizchip_setinterruptmask(intr_kind intr)
simr &= 0x0F; simr &= 0x0F;
imr |= simr; imr |= simr;
setIMR(imr); setIMR(imr);
//A20150601 : For integrating with W5300
#elif _WIZCHIP_ == 5300
setIMR( ((((uint16_t)imr) << 8) | (((uint16_t)simr) & 0x00FF)) );
#else #else
setIMR(imr); setIMR(imr);
setSIMR(simr); setSIMR(simr);
@ -485,6 +551,11 @@ intr_kind wizchip_getinterruptmask(void)
#if _WIZCHIP_ == 5100 #if _WIZCHIP_ == 5100
imr = getIMR(); imr = getIMR();
simr = imr & 0x0F; simr = imr & 0x0F;
//A20150601 : For integrating with W5300
#elif _WIZCHIP_ == 5300
ret = getIMR();
imr = (uint8_t)(ret >> 8);
simr = (uint8_t)ret;
#else #else
imr = getIMR(); imr = getIMR();
simr = getSIMR(); simr = getSIMR();

View File

@ -57,10 +57,12 @@
#include <stdint.h> #include <stdint.h>
/** /**
* @brief Select WIZCHIP. * @brief Select WIZCHIP.
* @todo You should select one, \b 5100, \b 5200 ,\b 5500 or etc. \n\n * @todo You should select one, \b 5100, \b 5200, \b 5300, \b 5500 or etc. \n\n
* ex> <code> #define \_WIZCHIP_ 5500 </code> * ex> <code> #define \_WIZCHIP_ 5500 </code>
*/ */
#define _WIZCHIP_ 5500 // 5100, 5200, 5500 #ifndef _WIZCHIP_
#define _WIZCHIP_ 5500 // 5100, 5200, 5300, 5500
#endif
#define _WIZCHIP_IO_MODE_NONE_ 0x0000 #define _WIZCHIP_IO_MODE_NONE_ 0x0000
#define _WIZCHIP_IO_MODE_BUS_ 0x0100 /**< Bus interface mode */ #define _WIZCHIP_IO_MODE_BUS_ 0x0100 /**< Bus interface mode */
@ -83,10 +85,12 @@
* @brief Define interface mode. * @brief Define interface mode.
* @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
*/ */
// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_DIR_ // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_DIR_
// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_ // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_
#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_ #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_
//A20150601 : Define the unit of IO DATA.
typedef uint8_t iodata_t;
//A20150401 : Indclude W5100.h file //A20150401 : Indclude W5100.h file
#include "W5100/w5100.h" #include "W5100/w5100.h"
@ -96,8 +100,12 @@
* @brief Define interface mode. * @brief Define interface mode.
* @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
*/ */
#ifndef _WIZCHIP_IO_MODE_
// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_ // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_
#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_ #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_
#endif
//A20150601 : Define the unit of IO DATA.
typedef uint8_t iodata_t;
#include "W5200/w5200.h" #include "W5200/w5200.h"
#elif (_WIZCHIP_ == 5500) #elif (_WIZCHIP_ == 5500)
#define _WIZCHIP_ID_ "W5500\0" #define _WIZCHIP_ID_ "W5500\0"
@ -115,9 +123,41 @@
* ex> <code> #define \_WIZCHIP_IO_MODE_ \_WIZCHIP_IO_MODE_SPI_VDM_ </code> * ex> <code> #define \_WIZCHIP_IO_MODE_ \_WIZCHIP_IO_MODE_SPI_VDM_ </code>
* *
*/ */
#ifndef _WIZCHIP_IO_MODE_
//#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_FDM_ //#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_FDM_
#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_VDM_ #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_VDM_
#endif
//A20150601 : Define the unit of IO DATA.
typedef uint8_t iodata_t;
#include "W5500/w5500.h" #include "W5500/w5500.h"
#elif ( _WIZCHIP_ == 5300)
#define _WIZCHIP_ID_ "W5300\0"
/**
* @brief Define interface mode.
* @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
*/
#ifndef _WIZCHIP_IO_MODE_
// #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_DIR_
#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_
#endif
//A20150601 : Define the unit and bus width of IO DATA.
/**
* @brief Select the data width 8 or 16 bits.
* @todo you should select the bus width. Select one of 8 or 16.
*/
#ifndef _WIZCHIP_IO_BUS_WIDTH_
#define _WIZCHIP_IO_BUS_WIDTH_ 8 // 16
#endif
#if _WIZCHIP_IO_BUS_WIDTH_ == 8
typedef uint8_t iodata_t;
#elif _WIZCHIP_IO_BUS_WIDTH_ == 16
typedef uint16_t iodata_t;
#else
#error "Unknown _WIZCHIP_IO_BUS_WIDTH_. It should be 8 or 16."
#endif
//
#include "W5300/w5300.h"
#else #else
#error "Unknown defined _WIZCHIP_. You should define one of 5100, 5200, and 5500 !!!" #error "Unknown defined _WIZCHIP_. You should define one of 5100, 5200, and 5500 !!!"
#endif #endif
@ -132,7 +172,9 @@
* @ref \_WIZCHIP_IO_MODE_BUS_DIR_, @ref \_WIZCHIP_IO_MODE_BUS_INDIR_). \n\n * @ref \_WIZCHIP_IO_MODE_BUS_DIR_, @ref \_WIZCHIP_IO_MODE_BUS_INDIR_). \n\n
* ex> <code> #define \_WIZCHIP_IO_BASE_ 0x00008000 </code> * ex> <code> #define \_WIZCHIP_IO_BASE_ 0x00008000 </code>
*/ */
#define _WIZCHIP_IO_BASE_ 0x00000000 // #ifndef _WIZCHIP_IO_BASE_
#define _WIZCHIP_IO_BASE_ 0x00000000 // 0x8000
#endif
//M20150401 : Typing Error //M20150401 : Typing Error
//#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS //#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS
@ -169,7 +211,7 @@ typedef struct __WIZCHIP
void (*_exit) (void); ///< critial section exit void (*_exit) (void); ///< critial section exit
}CRIS; }CRIS;
/** /**
* The set of @ref\_WIZCHIP_ select control callback func. * The set of @ref \_WIZCHIP_ select control callback func.
*/ */
struct _CS struct _CS
{ {
@ -184,11 +226,18 @@ typedef struct __WIZCHIP
/** /**
* For BUS interface IO * For BUS interface IO
*/ */
//M20156501 : Modify the function name for integrating with W5300
//struct
//{
// uint8_t (*_read_byte) (uint32_t AddrSel);
// void (*_write_byte) (uint32_t AddrSel, uint8_t wb);
//}BUS;
struct struct
{ {
uint8_t (*_read_byte) (uint32_t AddrSel); iodata_t (*_read_data) (uint32_t AddrSel);
void (*_write_byte) (uint32_t AddrSel, uint8_t wb); void (*_write_data) (uint32_t AddrSel, iodata_t wb);
}BUS; }BUS;
/** /**
* For SPI interface IO * For SPI interface IO
*/ */
@ -222,17 +271,19 @@ typedef enum
CW_GET_INTRTIME, ///< Set interval time between the current and next interrupt. CW_GET_INTRTIME, ///< Set interval time between the current and next interrupt.
CW_GET_ID, ///< Gets WIZCHIP name. CW_GET_ID, ///< Gets WIZCHIP name.
#if _WIZCHIP_ == 5500 //D20150601 : For no modification your application code
//#if _WIZCHIP_ == 5500
CW_RESET_PHY, ///< Resets internal PHY. Valid Only W5500 CW_RESET_PHY, ///< Resets internal PHY. Valid Only W5500
CW_SET_PHYCONF, ///< When PHY configured by internal register, PHY operation mode (Manual/Auto, 10/100, Half/Full). Valid Only W5000 CW_SET_PHYCONF, ///< When PHY configured by internal register, PHY operation mode (Manual/Auto, 10/100, Half/Full). Valid Only W5000
CW_GET_PHYCONF, ///< Get PHY operation mode in internal register. Valid Only W5500 CW_GET_PHYCONF, ///< Get PHY operation mode in internal register. Valid Only W5500
CW_GET_PHYSTATUS, ///< Get real PHY status on operating. Valid Only W5500 CW_GET_PHYSTATUS, ///< Get real PHY status on operating. Valid Only W5500
CW_SET_PHYPOWMODE, ///< Set PHY power mode as normal and down when PHYSTATUS.OPMD == 1. Valid Only W5500 CW_SET_PHYPOWMODE, ///< Set PHY power mode as normal and down when PHYSTATUS.OPMD == 1. Valid Only W5500
#endif //#endif
#if _WIZCHIP_ == 5200 || _WIZCHIP_ == 5500 //D20150601 : For no modification your application code
//#if _WIZCHIP_ == 5200 || _WIZCHIP_ == 5500
CW_GET_PHYPOWMODE, ///< Get PHY Power mode as down or normal, Valid Only W5100, W5200 CW_GET_PHYPOWMODE, ///< Get PHY Power mode as down or normal, Valid Only W5100, W5200
CW_GET_PHYLINK ///< Get PHY Link status, Valid Only W5100, W5200 CW_GET_PHYLINK ///< Get PHY Link status, Valid Only W5100, W5200
#endif //#endif
}ctlwizchip_type; }ctlwizchip_type;
/** /**
@ -397,7 +448,9 @@ void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void));
*or register your functions. *or register your functions.
*@note If you do not describe or register, null function is called. *@note If you do not describe or register, null function is called.
*/ */
void reg_wizchip_bus_cbfunc(uint8_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb)); //M20150601 : For integrating with W5300
//void reg_wizchip_bus_cbfunc(uint8_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb));
void reg_wizchip_bus_cbfunc(iodata_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, iodata_t wb));
/** /**
*@brief Registers call back function for SPI interface. *@brief Registers call back function for SPI interface.
@ -555,17 +608,17 @@ netmode_type wizchip_getnetmode(void);
/** /**
* @ingroup extra_functions * @ingroup extra_functions
* @brief Set retry time value(@ref RTR) and retry count(@ref RCR). * @brief Set retry time value(@ref _RTR_) and retry count(@ref _RCR_).
* @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission. * @details @ref _RTR_ configures the retransmission timeout period and @ref _RCR_ configures the number of time of retransmission.
* @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. * @param nettime @ref _RTR_ value and @ref _RCR_ value. Refer to @ref wiz_NetTimeout.
*/ */
void wizchip_settimeout(wiz_NetTimeout* nettime); void wizchip_settimeout(wiz_NetTimeout* nettime);
/** /**
* @ingroup extra_functions * @ingroup extra_functions
* @brief Get retry time value(@ref RTR) and retry count(@ref RCR). * @brief Get retry time value(@ref _RTR_) and retry count(@ref _RCR_).
* @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission. * @details @ref _RTR_ configures the retransmission timeout period and @ref _RCR_ configures the number of time of retransmission.
* @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout. * @param nettime @ref _RTR_ value and @ref _RCR_ value. Refer to @ref wiz_NetTimeout.
*/ */
void wizchip_gettimeout(wiz_NetTimeout* nettime); void wizchip_gettimeout(wiz_NetTimeout* nettime);

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@ -132,7 +132,7 @@ void get_seconds_from_ntp_server(uint8_t *buf, uint16_t idx)
case 20: case 20:
seconds -= 1*3600; seconds -= 1*3600;
break; break;
case 21: // case 21: //<EFBFBD><EFBFBD>?
case 22: case 22:
break; break;
case 23: case 23:
@ -217,6 +217,8 @@ void get_seconds_from_ntp_server(uint8_t *buf, uint16_t idx)
void SNTP_init(uint8_t s, uint8_t *ntp_server, uint8_t tz, uint8_t *buf) void SNTP_init(uint8_t s, uint8_t *ntp_server, uint8_t tz, uint8_t *buf)
{ {
NTP_SOCKET = s;
NTPformat.dstaddr[0] = ntp_server[0]; NTPformat.dstaddr[0] = ntp_server[0];
NTPformat.dstaddr[1] = ntp_server[1]; NTPformat.dstaddr[1] = ntp_server[1];
NTPformat.dstaddr[2] = ntp_server[2]; NTPformat.dstaddr[2] = ntp_server[2];

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@ -9,8 +9,6 @@
#include "httpParser.h" #include "httpParser.h"
#include "httpUtil.h" #include "httpUtil.h"
#include "common.h"
#ifdef _USE_SDCARD_ #ifdef _USE_SDCARD_
#include "ff.h" // header file for FatFs library (FAT file system) #include "ff.h" // header file for FatFs library (FAT file system)
#endif #endif

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@ -21,8 +21,16 @@ This driver provides the Berkeley Socket type APIs.
- Define what Host I/F mode is used in **wizchip_conf.h** - Define what Host I/F mode is used in **wizchip_conf.h**
## Revision History ## Revision History
* ioLibrary V3.0.1 Released : 15, July, 2015
* Bug fixed : In W5100, Fixed CS control problem in read/write buffer with SPI. Refer to M20150715.
* ioLibrary V3.0 Released : 01, June, 2015
* Add to W5300
* Typing Error in comments
* Refer to 20150601 in sources.
* Type casting error Fixed : 09, April. 2015 * Type casting error Fixed : 09, April. 2015
In socket.c, send() : Refer to M20150409 In socket.c, send() : Refer to M20150409
* ioLibrary V2.0 released : April. 2015 * ioLibrary V2.0 released : April. 2015
* Added to W5100, W5200 * Added to W5100, W5200
* Correct to some typing error * Correct to some typing error