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5463406f8c drop used submodules
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2025-01-13 14:36:42 +01:00
bec6816d45 images
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6e26675c0b images
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10dace876e image
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9ab3de38c7 moved
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6b18387931 fixes
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8c816cdb27 images for rgb-driver
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2025-01-13 13:57:00 +01:00
5d197e88a6 link fix
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0bdd0abd1a link fix
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2025-01-13 13:53:29 +01:00
14e66af948 rgb-driver
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870b795ffa images
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2025-01-13 13:43:25 +01:00
df6cf611ed tetris
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2025-01-13 13:40:24 +01:00
d7ac5ae421 ananke theme
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f05a1fcc32 footer
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129e376c3e old theme
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9d88fbbcab new theme
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a16b74880d footer
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0c3d542486 theme
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d629609973 new theme
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2c83e4dd2b release tagg
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23c39d491d ci fix
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c4c1bc1a80 push
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7d91e1e25c release teag
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38 changed files with 211 additions and 17 deletions

3
.gitmodules vendored
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[submodule "content/themes/paper"]
path = content/themes/paper
url = https://github.com/nanxiaobei/hugo-paper
[submodule "content/themes/ananke"]
path = content/themes/ananke
url = https://github.com/theNewDynamic/gohugo-theme-ananke.git

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@ -10,7 +10,8 @@ steps:
from_secret: container_registry_username
password:
from_secret: container_registry_password
build-args: "BASE_URL=https://minimal-setups.hottis.de"
build-args: "BASE_URL=https://minimal-setups.hottis.de, RELEASETAG=${CI_COMMIT_SHA}"
dockerfile: Dockerfile
when:
- event: [push,tag]
@ -21,10 +22,10 @@ steps:
- source: kube_config
target: KUBE_CONFIG_CONTENT
commands:
- export IMAGE_TAG=$CI_COMMIT_TAG
- export IMAGE_TAG=$CI_COMMIT_SHA
- printf "$KUBE_CONFIG_CONTENT" > /tmp/kubeconfig
- export KUBECONFIG=/tmp/kubeconfig
- ./deployment/deploy.sh
when:
- event: [tag]
- event: [push,tag]

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@ -1,9 +1,11 @@
# builder
FROM hugomods/hugo:base-non-root AS builder
ARG BASE_URL ""
ARG RELEASETAG "unset"
# --chown is required since kaniko in woodpecker otherwise copies as root and
# the hugo command below fails since it is executed as hugo
COPY --chown=hugo:hugo content/ /src
RUN sed -i 's/%RELEASETAG%/'${RELEASETAG}'/' /src/content/about.md
RUN if [ "$BASE_URL" = ""]; then hugo; else hugo -b $BASE_URL; fi
# server

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---
title: "Minimal Setups"
---
This is the Minimal Setups page

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@ -3,13 +3,13 @@ title: "About"
menu:
main:
weight: 1
releasetag: '{{ getenv "HUGO_RELEASETAG"}}'
---
## About
This is the about page
{{ .Params.releasetag }}
[Wolfgang Hottgenroth](mailto:woho@hottis.de)
`ReleaseTag = %RELEASETAG%`

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## Generating signals for PL 9823 using a MSP430
### Debugging
```
mspdebug rf2500 gdb
msp430-gdb -x firmware.gdb
```
Attention: the gdb in the TI toolchain package is broken, use the one from Debian
### Signals Working Cycler
These signals are related to code under tag `cycler_works_include_output_stage`.
First octets:
![](/cycler_working_first_octets.png)
Last octets:
![](/cycler_working_last_octets.png)
Schematics and legend for signals:
![](/schematics.jpeg)
#### Some more explanations
Consider above schematics and the screen shot "Last octets" from the oscilloscope.
![](/timing.png)
Timer TA1 is running in "up mode" to the value 45 set in compare register `TA1CCR0`. The compare registers `TA1CCR1` is set to 10, `TA1CCR2` is set to 22.
The output mode of the timer is set to "Reset/Set", which means the GPIO associated with `TA1CCR1` (P2.1) and `TA1CCR2` (P2.4) are set at the overflow and
restart of the counter and reset when the counter matches the associated compare value.
So, on P2.1 (D1 on the oscilloscope) we have a long pulse and at P2.4 (D0 on the oscilloscope) we have a short pulse, with synchronous raising edge.
![](/74hc74-function-table.png)
The inverted signal P2.4 is connected to the Clock input of a 74HC74 D-flipflop, the data input of the flipflop is connected to GPIO P1.0 (D2 on the oscilloscope).
The interrupt service routine `shifter_isr` is triggered by the overflow and restart of the timer, this interrupt service routine provides the next bit to be
signaled on P1.0. This bit is stored at the falling edge of P2.4 (long pulse) in the flipflop.
The short pulse (P2.1, D1) is ANDed using a 74HC08 with the inverted output of the flipflop, the long pulse (P2.4, D0) is ANDed with the non-inverted output of
the flipflop, the ANDed results are ORed using a 74HC32.
So, at the output of the OR gate (yellow on the oscilloscope) we get a long pulse for a 1 at P1.0 provided by the ISR and a short pulse for a 0 at P1.0.
The routine `drawscreen` takes color values from the "frame buffer" beginning at `screendata` and translated them into the red, green and blue values and provides these values, first red, then green and finally blue to the ISR via the `DATA_REGISTER`.
The ISR cycles over the `DATA_REGISTER` and presents the bits at P1.0.
Additionally, when the first bit of a full draw screen cycle is presented at P1.0 by the ISR, it also sets the data enable signal at P1.1 and when the last bit has been provided it disabled the data enable signal. This signal is also synchronized using a flipflop and used to enable the short/long pulses using an AND gate.
### Timing
Complete cycle: 2.48us
![](/pulse_complete.png)
Short pulse: 550ns
![](/pulse_short.png)
Long pulse: 1.18us
![](/pulse_long.png)
### Load Time
During of loading data into five LEDs: 297us
![](/five_leds.png)
During of loading data into six LEDs: 297us
![](/six_leds.png)
| # of LEDs | Load Time measured | calculated |
| --------- | ------------------ | ---------- |
| 5 | 297us | |
| 6 | 354us | 356.4us |
| 10 | | 594us |
| 100 | | 5.9ms |
| 200 | | 11.8ms |
### Reset Circuitry
It appears that the output voltage of the power supply raises that slow, that the MCU
will not handle the reset correctly.
The following circuitry should generate a valid reset signal far enough from the raise
of the supply voltage:
![](/reset-circuit.jpeg)
The circuit generates the following signals:
![](/reset-signal.png)
##### Reference voltage (green):
```math
U_ref = 3.3V \frac{22k\Omega}{22k\Omega + 10k\Omega} = 2.2V
```
##### Trigger voltage (purple):
```math
U_trigg = 3.3V \frac{330k\Omega}{330k\Omega + 82k\Omega} = 2.64V
```
##### RC constant:
```math
\tau = 82k\Omega \cdot 100nF = 8.2ms
```

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+++
date = '2025-01-12T19:33:39+01:00'
draft = false
title = 'Test06'
+++

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# Tetris - Hardware and Software
![](/IMG_4936.jpg)
Update Amplifier (separate input circuitry per PSG, it appears, that a silent PSG has a DC level on its output which is summarized to the AC output of the working PSG, so two input circuits with individual couping capacitor):
![](/IMG_4941.jpg)
Update of the power switch of the amplifier (at appears, that the small transistor couldn't deliver enough current):
![](/IMG_4958.jpeg)
This Tetris implementation consists of a hardware and a software (running on that hardware).
The hardware utilizes four MSP430 microcontrollers for 1.) the game play, 2.) the play ground canvas, 3.) the score display and 4.) the sound effects.
Further documentation including calculations and drawing can be found in the `docs` subdirs of the four main subdirs.
## Game Play
Code is in subdir `game-ctrl` (https://gitea.hottis.de/wn/tetris/src/branch/main/game-ctrl).
In the firmware for this MSP430 microcontroller the whole game mechanics, reading the buttons, reading and writing the highscore EEPROM and the control of the peripherial microcontrollers are implemented.
The buttons are debounced using RC circuitry and Schmitt triggers and connected to GPIOs of the microcontroller.
The peripherial microcontrollers and the EEPROM are connected via SPI including individual chip select lines.
![](/game-ctrl.jpg)
## Play Ground Canvas
Code is in subdir `rgb-driver` (https://gitea.hottis.de/wn/tetris/src/branch/main/rgb-driver).
The play ground is implemented using a 10 * 20 matrix of PL9823 RGB LEDs which are controlled by another MSP430 microcontroller. The firmware for this microcontroller is implemented for performance and real time requirements in assembly code. Through some discret logic the signals for PL9823 LEDs are generated. Major challenge was to generated the signals according the datasheet of all 200 (including a mini canvas for the stone preview: 212) LEDs in real time without interrupts.
The communcation with the game play controller is implemented as a sequences of tuples of LED address (0 to 211) and color code. A single octet of 253 where the LED address is expected is taken as the end-of-telegram mark. Readiness to receive a telegram is signaled to the game play controller via a single line connected to a GPIO of the game play controller.
![](/rgb-driver.jpg)
[Details are here]({{< ref "rgb-driver.md" >}} "Details are here")
## Score Display
Code is in subdir `display-driver` (https://gitea.hottis.de/wn/tetris/src/branch/main/display-driver).
In the first place, a MAX7221 was meant to be used for connecting a multiple digit seven-segment display. However, it appears, that the MAX7221 requires 3.5V as minimum voltage for the high-level, which caan't be provided by the MSP430 (which runs on 3.3V) and level-shifters haven't been around. Thus, the minimal required amount of functionality of the MAX7221 has been implemented in C on an MSP430. Just four digits are supported.
Communication with the game play controller is just a 16 bit number to be displayed.
![](/display-driver.jpg)
## Sound Effects
Code is in subdir `sound-driver` (https://gitea.hottis.de/wn/tetris/src/branch/main/sound-driver).
An MSP430 microcontroller and two mediaeval AY-3-8913 sound chips are deployed. The sound chips themselve run on 5V, their 8-bit-address/data bus is connected to the port 2 (bit 0 to 7) of the microcontroller. The bus control signal `_CS`, `BC1` and `BDIR` are generated in software and provided via GPIOs.
An amplifier following the proposal of the AY-3-8913 datasheet is implemented using a LM386 chip. A MOSFET BS108 controlled via a GPIO is use the shortcut the input of the amplifier to ground to mute sound effects.
The clock generator proposed by the AY-3-8913 does not work reliably, so an alternative design from "The Art of Electronics" has been used.
![](/sound-driver-1.jpg)
![](/sound-driver-2.png)
![](/sound-driver-3.jpg)
![](/sound-driver-4.jpg)

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baseURL = 'https://example.org/'
languageCode = 'en-us'
title = 'Minimal Setups {{ getenv "HUGO_RELEASETAG }}'
title = 'Minimal Setups'
theme = "ananke"
sectionPagesMenu = "main"

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Subproject commit 8eeb1e8a513d3a0e32e0b305d445c3f6d545eeb3