wrong logical polarity fixed

This commit is contained in:
Wolfgang Hottgenroth 2015-02-23 21:39:29 +01:00
parent f4194c29de
commit cb0fde96fd

View File

@ -23,9 +23,9 @@ public:
switch (m_state) { switch (m_state) {
case 0: case 0:
if (P2IN & m_bit) { if (P2IN & m_bit) {
m_cnt++;
} else {
m_cnt = 0; m_cnt = 0;
} else {
m_cnt++;
} }
if (m_cnt > 100) { if (m_cnt > 100) {
m_state = 1; m_state = 1;
@ -38,9 +38,9 @@ public:
break; break;
case 2: case 2:
if (P2IN & m_bit) { if (P2IN & m_bit) {
m_cnt = 0;
} else {
m_cnt++; m_cnt++;
} else {
m_cnt = 0;
} }
if (m_cnt > 20) { if (m_cnt > 20) {
m_state = 0; m_state = 0;